From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Melody Olvera <quic_molvera@quicinc.com>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Konrad Dybcio <konrad.dybcio@linaro.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] arm64: dts: qcom: qdu1000: Add IPCC, MPSS, AOSS nodes
Date: Tue, 14 Feb 2023 10:47:42 +0100 [thread overview]
Message-ID: <7336923b-e322-1211-0c1d-7ad70c7bfef7@linaro.org> (raw)
In-Reply-To: <20230213190122.178501-2-quic_molvera@quicinc.com>
On 13/02/2023 20:01, Melody Olvera wrote:
> Add nodes for IPCC, MPSS, and AOSS drivers. Also update
> the scm node to include its interconnect.
>
> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
> ---
>
> + aoss_qmp: power-controller@c300000 {
> + compatible = "qcom,qdu1000-aoss-qmp", "qcom,aoss-qmp";
> + reg = <0x0 0xc300000 0x0 0x400>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_AOP
> + IPCC_MPROC_SIGNAL_GLINK_QMP
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> + #clock-cells = <0>;
> + #power-domain-cells = <1>;
This does not look right. Which part of aoss-qmp registers power domains?
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-02-14 9:48 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-13 19:01 [PATCH 0/3] arm64: dts: qcom: Add mpss support to QDU1000/QRU1000 SoCs Melody Olvera
2023-02-13 19:01 ` [PATCH 1/3] arm64: dts: qcom: qdu1000: Add IPCC, MPSS, AOSS nodes Melody Olvera
2023-02-14 9:47 ` Krzysztof Kozlowski [this message]
2023-02-14 21:47 ` Melody Olvera
2023-02-13 19:01 ` [PATCH 2/3] arm64: dts: qcom: qdu1000-idp: Enable mpss Melody Olvera
2023-02-14 9:59 ` Dmitry Baryshkov
2023-02-13 19:01 ` [PATCH 3/3] arm64: dts: qcom: qru1000-idp: " Melody Olvera
2023-02-14 9:59 ` Dmitry Baryshkov
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