From: Stanimir Varbanov <stanimir.varbanov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: Jordan Crouse <jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 13/16] drm/msm: gpu: Add support for the GPMU
Date: Mon, 7 Nov 2016 14:58:01 +0200 [thread overview]
Message-ID: <740c4fda-dfd6-7a70-9cb7-3eec6a5781ca@linaro.org> (raw)
In-Reply-To: <1478299497-9729-14-git-send-email-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Hi Jordan,
On 11/05/2016 12:44 AM, Jordan Crouse wrote:
> Most 5XX targets have GPMU (Graphics Power Management Unit) that
> handles a lot of the heavy lifting for power management including
> thermal and limits management and dynamic power collapse. While
> the GPMU itself is optional, it is usually nessesary to hit
> aggressive power targets.
>
> The GPMU firmware needs to be loaded into the GPMU at init time via a
> shared hardware block of registers. Using the GPU to write the microcode
> is more efficient than using the CPU so at first load create an indirect
> buffer that can be executed during subsequent initalization sequences.
>
> After loading the GPMU gets initalized through a shared register
> interface and then we mostly get out of its way and let it do
> its thing.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
> drivers/gpu/drm/msm/Makefile | 1 +
> drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 64 +++++-
> drivers/gpu/drm/msm/adreno/a5xx_gpu.h | 23 ++
> drivers/gpu/drm/msm/adreno/a5xx_power.c | 341 +++++++++++++++++++++++++++++
> drivers/gpu/drm/msm/adreno/adreno_device.c | 1 +
> drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 +
> 6 files changed, 428 insertions(+), 3 deletions(-)
> create mode 100644 drivers/gpu/drm/msm/adreno/a5xx_power.c
>
<cut>
> +/* Enable the GPMU microcontroller */
> +static int a5xx_gpmu_init(struct msm_gpu *gpu)
> +{
> + struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
> + struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
> + struct msm_ringbuffer *ring = gpu->rb;
> +
> + if (!a5xx_gpu->gpmu_dwords)
> + return 0;
> +
> + /* Turn off protected mode for this operation */
> + OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1);
This looks wrong, shouldn't it be?
OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 0)
> + OUT_RING(ring, 0);
> +
> + /* Kick off the IB to load the GPMU microcode */
> + OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3);
> + OUT_RING(ring, lower_32_bits(a5xx_gpu->gpmu_iova));
> + OUT_RING(ring, upper_32_bits(a5xx_gpu->gpmu_iova));
> + OUT_RING(ring, a5xx_gpu->gpmu_dwords);
> +
> + /* Turn back on protected mode */
> + OUT_PKT7(ring, CP_SET_PROTECTED_MODE, 1);
> + OUT_RING(ring, 1);
> +
> + gpu->funcs->flush(gpu);
> +
> + if (!gpu->funcs->idle(gpu)) {
> + DRM_ERROR("%s: Unable to load GPMU firmware. GPMU will not be active\n",
> + gpu->name);
> + return -EINVAL;
> + }
> +
> + gpu_write(gpu, REG_A5XX_GPMU_WFI_CONFIG, 0x4014);
> +
> + /* Kick off the GPMU */
> + gpu_write(gpu, REG_A5XX_GPMU_CM3_SYSRESET, 0x0);
> +
> + /*
> + * Wait for the GPMU to respond. It isn't fatal if it doesn't, we just
> + * won't have advanced power collapse.
> + */
> + if (spin_usecs(gpu, 25, REG_A5XX_GPMU_GENERAL_0, 0xFFFFFFFF,
> + 0xBABEFACE))
> + DRM_ERROR("%s: GPMU firmware initialization timed out\n",
> + gpu->name);
> +
> + return 0;
> +}
> +
<cut>
--
regards,
Stan
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next prev parent reply other threads:[~2016-11-07 12:58 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-04 22:44 [RFC] Initial support for the Adreno A5XX Jordan Crouse
[not found] ` <1478299497-9729-1-git-send-email-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-04 22:44 ` [PATCH 01/16] drm/msm: Remove dependency on COMMON_CLK Jordan Crouse
2016-11-04 22:44 ` [PATCH 02/16] drm/msm: Rename the MSM driver so it doesn't conflict with other drivers Jordan Crouse
2016-11-04 22:44 ` [PATCH 03/16] drm/msm: gpu: Cut down the list of "generic" registers to the ones we use Jordan Crouse
2016-11-04 22:44 ` [PATCH 04/16] drm: msm: Flush the cache immediately after allocating pages Jordan Crouse
2016-11-06 14:15 ` [Freedreno] " Rob Clark
[not found] ` <CAF6AEGtDv8tRZi82Eno5RF6a58qSRpjYcUo-J8dDDioDLLJqmg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-11-07 8:35 ` Archit Taneja
[not found] ` <99a66f0f-ec84-a26e-0108-60367362c29e-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 12:19 ` Rob Clark
2016-11-07 18:01 ` [Freedreno] " Jordan Crouse
2016-11-04 22:44 ` [PATCH 05/16] drm/msm: gpu: Return error on hw_init failure Jordan Crouse
[not found] ` <1478299497-9729-6-git-send-email-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 18:54 ` Rob Clark
2016-11-04 22:44 ` [PATCH 06/16] drm/msm: gpu: Add OUT_TYPE4 and OUT_TYPE7 Jordan Crouse
2016-11-04 22:44 ` [PATCH 07/16] drm/msm: Add adreno_gpu_write64() Jordan Crouse
2016-11-07 19:19 ` [Freedreno] " Rob Clark
2016-11-04 22:44 ` [PATCH 08/16] drm/msm: Remove 'src_clk' from adreno configuration Jordan Crouse
2016-11-04 22:44 ` [PATCH 09/16] drm/msm: gpu Add new gpu register read/write functions Jordan Crouse
[not found] ` <1478299497-9729-10-git-send-email-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 19:17 ` Rob Clark
2016-11-04 22:44 ` [PATCH 10/16] drm/msm: Disable interrupts during init Jordan Crouse
2016-11-04 22:44 ` [PATCH 13/16] drm/msm: gpu: Add support for the GPMU Jordan Crouse
[not found] ` <1478299497-9729-14-git-send-email-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 12:58 ` Stanimir Varbanov [this message]
2016-11-07 13:02 ` [Freedreno] " Rob Clark
[not found] ` <CAF6AEGuW6ThJM-+X-=XGtqTCY_hcq8DghJHRf38OWjy4Z3R=DQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-11-07 14:47 ` Stanimir Varbanov
[not found] ` <740c4fda-dfd6-7a70-9cb7-3eec6a5781ca-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2016-11-07 18:09 ` Jordan Crouse
2016-11-04 22:44 ` [PATCH 15/16] drm/msm: Add a quick and dirty PIL loader Jordan Crouse
2016-11-04 22:44 ` [PATCH 16/16] drm/msm: gpu: Use the zap shader on 5XX if we can Jordan Crouse
2016-11-04 22:44 ` [PATCH 11/16] arm64: dts: Add Adreno GPU and GPU smmu definitions Jordan Crouse
2016-11-04 22:44 ` [PATCH 12/16] drm/msm: gpu: Add A5XX target support Jordan Crouse
2016-11-04 22:44 ` [PATCH 14/16] firmware: qcom_scm: Add qcom_scm_gpu_zap_resume() Jordan Crouse
2016-11-08 17:12 ` [Freedreno] [RFC] Initial support for the Adreno A5XX Jordan Crouse
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