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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id b7-20020a056512024700b004e7fa99f3f4sm27542lfo.265.2023.04.19.15.43.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Apr 2023 15:43:05 -0700 (PDT) Message-ID: <74c59560-8a79-150f-0c1e-13f22eb35cb2@linaro.org> Date: Thu, 20 Apr 2023 01:43:04 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH 04/11] drm/msm/dpu: allow using lm mixer base stage Content-Language: en-GB To: Arnaud Vrac , Rob Clark , Abhinav Kumar , Sean Paul , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20230419-dpu-tweaks-v1-0-d1bac46db075@freebox.fr> <20230419-dpu-tweaks-v1-4-d1bac46db075@freebox.fr> From: Dmitry Baryshkov In-Reply-To: <20230419-dpu-tweaks-v1-4-d1bac46db075@freebox.fr> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 19/04/2023 17:41, Arnaud Vrac wrote: > The dpu backend already handles applying alpha to the base stage, so we > can use it to render the bottom plane in all cases. This allows mixing > one additional plane with the hardware mixer. > > Signed-off-by: Arnaud Vrac This might require additional changes. First, for the STAGE_BASE pipe in the source split mode (iow using two LMs) should programmed with respect to the right LM's x offset (rather than usual left top-left LM). See mdss_mdp_pipe_position_update(). Also this might need some interaction with CTL_MIXER_BORDER_OUT being set or not. If I remember correctly, if there bottom plane is not fullscreen or if there are no planes at all, we should set CTL_MIXER_BORDER_OUT (which takes STAGE_BASE) and start assigning them from STAGE0. If not, we can use STAGE_BASE. > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > index 14b5cfe306113..148921ed62f85 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > @@ -881,7 +881,7 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, > r_pipe->multirect_mode = DPU_SSPP_MULTIRECT_NONE; > r_pipe->sspp = NULL; > > - pstate->stage = DPU_STAGE_0 + pstate->base.normalized_zpos; > + pstate->stage = DPU_STAGE_BASE + pstate->base.normalized_zpos; > if (pstate->stage >= pdpu->catalog->caps->max_mixer_blendstages) { > DPU_ERROR("> %d plane stages assigned\n", > pdpu->catalog->caps->max_mixer_blendstages - DPU_STAGE_0); > -- With best wishes Dmitry