From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Sahil Chandna <quic_chandna@quicinc.com>,
kernel@quicinc.com, andersson@kernel.org, konradybcio@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
quic_nkumarsi@quicinc.com, quic_akdwived@quicinc.com,
quic_kkotecha@quicinc.com
Subject: Re: [PATCH] arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Add industrial mezzanine
Date: Fri, 13 Dec 2024 01:31:55 +0100 [thread overview]
Message-ID: <7abec959-3987-412d-97ce-92cd3e501dc1@oss.qualcomm.com> (raw)
In-Reply-To: <20241206065156.2573-1-quic_chandna@quicinc.com>
On 6.12.2024 7:51 AM, Sahil Chandna wrote:
> The industrial mezzanine kit enhances the capabilities of QCS6490
> rb3gen2 core kit. Add support for industrial mezzanine board.
>
> Signed-off-by: Sahil Chandna <quic_chandna@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 3 ++
> .../qcs6490-rb3gen2-industrial-mezzanine.dtso | 44 +++++++++++++++++++
> 2 files changed, 47 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 6ca8db4b8afe..6fe5a5ccd950 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -111,6 +111,9 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb
> +
> +qcs6490-rb3gen2-industrial-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-industrial-mezzanine.dtbo
> +
> dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb
> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso
> new file mode 100644
> index 000000000000..74f2f782d166
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso
> @@ -0,0 +1,44 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +/*
Err.. does this even compile? Is this a whole-file-as-a-comment?
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include "pm7250b.dtsi"
> +#include "sc7280.dtsi"
> +
> +&pm7250b_gpios {
> + gpio5_tpm_dig_out {
Node names must not contain underscores, use hyphens instead. Please
refer to [1] and make sure to test your patch with make CHECK_DTBS=1
Drop the outer node and include \/ under &pm7250b_gpios directly
> + gpio5_dig_out_default: gpio5_dig_out_default {
> + pins = "gpio5";
> + function = "normal";
> + power-source = <1>;
> + output-high;
> + input-disable;
> + bias-pull-up;
> + qcom,drive-strength = <3>;
> + };
> + };
> +};
> +
> +&qupv3_id_1 {
> + status = "okay";
> +};
It's already enabled, drop this hunk
> +
> +&spi11 {
> + status = "okay";
> +
> + st33htpm0: st33htpm@0 {
tpm@
> + compatible = "st,st33htpm-spi";
> + reg = <0>;
> + spi-max-frequency = <20000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
This doesn't have any child nodes, remove these two
> + pinctrl-names = "default";
> + pinctrl-0 = <&gpio5_dig_out_default>;
The label should be descriptive, usually following the (destination)
name on the schematic
> + status="okay";
When you add a new node, it's enabled by default - drop this line
Konrad
[1] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
next prev parent reply other threads:[~2024-12-13 0:32 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-06 6:51 [PATCH] arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Add industrial mezzanine Sahil Chandna
2024-12-13 0:31 ` Konrad Dybcio [this message]
2024-12-13 8:11 ` Krzysztof Kozlowski
2024-12-13 8:10 ` Krzysztof Kozlowski
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