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Thu, 17 Oct 2024 05:18:50 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49H5Ink5030081 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 17 Oct 2024 05:18:49 GMT Received: from [10.214.67.37] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 16 Oct 2024 22:18:46 -0700 Message-ID: <7bf56716-886d-4e2c-9a90-e31b0bfa4a89@quicinc.com> Date: Thu, 17 Oct 2024 10:48:32 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] dt-bindings: mailbox: qcom,cpucp-mbox: Add sc7280 cpucp mailbox instance To: Dmitry Baryshkov CC: Rob Herring , Sibi Sankar , "Jassi Brar" , Krzysztof Kozlowski , Conor Dooley , , Bjorn Andersson , Konrad Dybcio , , , , "Ramakrishna Gottimukkula" References: <20240924050941.1251485-1-quic_kshivnan@quicinc.com> <20240924050941.1251485-2-quic_kshivnan@quicinc.com> <20240924232526.GA563039-robh@kernel.org> <2d4e47fd-0aaf-4533-a96f-95ada853d9a0@quicinc.com> Content-Language: en-US From: Shivnandan Kumar In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: AjP0Rs-BfMjWDqorJ5-ssnVIzvAZl_NY X-Proofpoint-ORIG-GUID: AjP0Rs-BfMjWDqorJ5-ssnVIzvAZl_NY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxlogscore=999 lowpriorityscore=0 mlxscore=0 bulkscore=0 malwarescore=0 suspectscore=0 priorityscore=1501 phishscore=0 clxscore=1011 adultscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410170033 Thanks Dmitry for reviewing the patch On 10/6/2024 10:41 PM, Dmitry Baryshkov wrote: > On Thu, Oct 03, 2024 at 11:13:02AM GMT, Shivnandan Kumar wrote: >> thanks Rob for reviewing this patch. >> >> >> On 9/25/2024 4:55 AM, Rob Herring wrote: >>> On Tue, Sep 24, 2024 at 10:39:39AM +0530, Shivnandan Kumar wrote: >>>> sc7280 has a cpucp mailbox. Document them. >>> >>> And is different from the existing device how? >> >> It is different with respect to the register placement. > > Register placement in the global map or the internal register structure? the register placement varies both internally and globally as well. > >> >> Thanks, >> Shivnandan >> >>> >>>> >>>> Signed-off-by: Shivnandan Kumar >>>> --- >>>> .../devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml | 5 +++-- >>>> 1 file changed, 3 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml >>>> index f7342d04beec..4a7ea072a3c1 100644 >>>> --- a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml >>>> +++ b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml >>>> @@ -15,8 +15,9 @@ description: >>>> >>>> properties: >>>> compatible: >>>> - items: >>>> - - const: qcom,x1e80100-cpucp-mbox >>>> + enum: >>>> + - qcom,x1e80100-cpucp-mbox >>>> + - qcom,sc7280-cpucp-mbox >>>> >>>> reg: >>>> items: >>>> -- >>>> 2.25.1 >>>> >