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[212.182.62.129]) by smtp.gmail.com with ESMTPSA id p3-20020a056512312300b0050e7fe17591sm366610lfd.137.2024.01.17.12.28.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 17 Jan 2024 12:28:20 -0800 (PST) Message-ID: <7e48e51e-e16a-41b9-800d-960c627b8da6@linaro.org> Date: Wed, 17 Jan 2024 21:28:18 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC 4/7] soc: qcom: Utilize qcom scmi vendor protocol for bus dvfs Content-Language: en-US To: Sibi Sankar , sudeep.holla@arm.com, cristian.marussi@arm.com, andersson@kernel.org, jassisinghbrar@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, quic_rgottimu@quicinc.com, quic_kshivnan@quicinc.com, conor+dt@kernel.org, Amir Vajid References: <20240117173458.2312669-1-quic_sibis@quicinc.com> <20240117173458.2312669-5-quic_sibis@quicinc.com> From: Konrad Dybcio In-Reply-To: <20240117173458.2312669-5-quic_sibis@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 1/17/24 18:34, Sibi Sankar wrote: > From: Shivnandan Kumar > > This patch introduces a client driver that interacts with the SCMI QCOM > vendor protocol and passes on the required tuneables to start various > features running on the SCMI controller. > > Signed-off-by: Shivnandan Kumar > Co-developed-by: Ramakrishna Gottimukkula > Signed-off-by: Ramakrishna Gottimukkula > Co-developed-by: Amir Vajid > Signed-off-by: Amir Vajid > Co-developed-by: Sibi Sankar > Signed-off-by: Sibi Sankar > --- [...] > + > +struct cpufreq_memfreq_map { > + unsigned int cpufreq_mhz; > + unsigned int memfreq_khz; > +}; Weird use of tabs [...] > +static int get_mask(struct device_node *np, u32 *mask) > +{ > + struct device_node *dev_phandle; > + struct device *cpu_dev; > + int cpu, i = 0; > + int ret = -ENODEV; Don't initialize ret here, return 0 instead of breaking and return enodev otherwise. > + > + dev_phandle = of_parse_phandle(np, "qcom,cpulist", i++); > + while (dev_phandle) { > + for_each_possible_cpu(cpu) { > + cpu_dev = get_cpu_device(cpu); > + if (cpu_dev && cpu_dev->of_node == dev_phandle) { > + *mask |= BIT(cpu); > + ret = 0; > + break; > + } > + } of_cpu_node_to_id() > + dev_phandle = of_parse_phandle(np, "qcom,cpulist", i++); > + } > + > + return ret; > +} > + > +static struct cpufreq_memfreq_map *init_cpufreq_memfreq_map(struct device *dev, > + struct device_node *of_node, > + u32 *cnt) I really feel like this is trying to reinvent OPP.. if you structure your entries like so: opp-0 { opp-hz = /bits/ 64 <12341234 43214321>; }; you'll be able to use all the fantastic APIs that have been created over the years! [...] > + monitor->mon_type = (of_property_read_bool(monitor_np, "qcom,compute-mon")) ? 1 : 0; > + monitor->ipm_ceil = (of_property_read_bool(monitor_np, "qcom,compute-mon")) ? 0 : 20000000; What does it even mean for a monitor to be a compute mon? There seem to be no dt-bindings for properties referenced in this driver, neither in the series nor in the dependencies. This is strictly required. Konrad