Re: [PATCH 3/4] arm64: dts: qcom: qcm6490-idp: Update protected clocks list

[Taniya Das <quic_tdas@quicinc.com>]

On 6/10/2024 11:51 PM, Dmitry Baryshkov wrote:
> On Mon, Jun 10, 2024 at 03:57:34PM +0530, Taniya Das wrote:
>>
>>
>> On 5/31/2024 5:34 PM, Dmitry Baryshkov wrote:
>>> On Fri, May 31, 2024 at 03:52:51PM +0530, Taniya Das wrote:
>>>> Certain clocks are not accessible on QCM6490-IDP board,
>>>> thus mark them as protected. Update the lpassaudio node to
>>>> support the new compatible as the lpassaudio needs to support
>>>> the reset functionality on the QCM6490 board and the rest of
>>>> the Audio functionality would be provided from the LPASS
>>>> firmware.
>>>>
>>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>>>> ---
>>>>    arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 28 +++++++++++++++++++++++-
>>>>    1 file changed, 27 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
>>>> index a0668f767e4b..4eece564331a 100644
>>>> --- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
>>>> +++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
>>>> @@ -1,6 +1,6 @@
>>>>    // SPDX-License-Identifier: BSD-3-Clause
>>>>    /*
>>>> - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
>>>> + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
>>>>     */
>>>>    /dts-v1/;
>>>> @@ -688,3 +688,29 @@
>>>>    &wifi {
>>>>    	memory-region = <&wlan_fw_mem>;
>>>>    };
>>>> +
>>>> +&gcc {
>>>> +	protected-clocks = <GCC_AGGRE_NOC_PCIE_1_AXI_CLK> ,<GCC_PCIE_1_AUX_CLK>,
>>>> +			<GCC_PCIE_1_AUX_CLK_SRC>, <GCC_PCIE_1_CFG_AHB_CLK>,
>>>> +			<GCC_PCIE_1_MSTR_AXI_CLK>, <GCC_PCIE_1_PHY_RCHNG_CLK_SRC>,
>>>> +			<GCC_PCIE_1_PIPE_CLK>, <GCC_PCIE_1_PIPE_CLK_SRC>,
>>>> +			<GCC_PCIE_1_SLV_AXI_CLK>, <GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
>>>> +			<GCC_QSPI_CNOC_PERIPH_AHB_CLK>, <GCC_QSPI_CORE_CLK>,
>>>> +			<GCC_QSPI_CORE_CLK_SRC>,<GCC_USB30_SEC_MASTER_CLK>,
>>>> +			<GCC_USB30_SEC_MASTER_CLK_SRC>, <GCC_USB30_SEC_MOCK_UTMI_CLK>,
>>>> +			<GCC_USB30_SEC_MOCK_UTMI_CLK_SRC>,
>>>> +			<GCC_USB30_SEC_MOCK_UTMI_POSTDIV_CLK_SRC>, <GCC_USB30_SEC_SLEEP_CLK>,
>>>> +			<GCC_USB3_SEC_PHY_AUX_CLK>, <GCC_USB3_SEC_PHY_AUX_CLK_SRC>,
>>>> +			<GCC_USB3_SEC_PHY_COM_AUX_CLK>, <GCC_USB3_SEC_PHY_PIPE_CLK>,
>>>> +			<GCC_USB3_SEC_PHY_PIPE_CLK_SRC>, <GCC_CFG_NOC_LPASS_CLK>,
>>>> +			<GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, <GCC_MSS_CFG_AHB_CLK>,
>>>> +			<GCC_MSS_OFFLINE_AXI_CLK>, <GCC_MSS_SNOC_AXI_CLK>,
>>>> +			<GCC_MSS_Q6_MEMNOC_AXI_CLK>, <GCC_MSS_Q6SS_BOOT_CLK_SRC>,
>>>> +			<GCC_SEC_CTRL_CLK_SRC>, <GCC_WPSS_AHB_CLK>,
>>>> +			<GCC_WPSS_AHB_BDG_MST_CLK>, <GCC_WPSS_RSCP_CLK>;
>>>
>>> Is there any reason why this list is significantly larger than a list
>>> for RB3g2 or FP5?
>>>
>>
>> Unfortunately these are all protected on the IDP board and any access would
>> cause a NoC error and then board will fail to boot up.
> 
> Why? I mean, why does it contain the clocks that are allowed to be
> touched on RB3g2 and FP5?
> 

There are some use case level and board functionality changes between 
RB3g2/FP5 vs IDP. Thus these clocks are protected and cannot be accessed.

-- 
Thanks & Regards,
Taniya Das.