Re: [PATCH 2/6] dt-bindings: display/msm: gpu: Document A612 GPU

[Krzysztof Kozlowski <krzk@kernel.org>]

On 17/10/2025 19:08, Akhil P Oommen wrote:
> A612 GPU has a new IP called RGMU (Reduced Graphics Management Unit)
> which replaces GMU. But it doesn't do clock or voltage scaling. So we
> need the gpu core clock in the GPU node along with the power domain to
> do clock and voltage scaling from the kernel. Update the bindings to
> describe this GPU.
> 
> Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
> ---
>  .../devicetree/bindings/display/msm/gpu.yaml       | 31 ++++++++++++++++++++--
>  1 file changed, 29 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml
> index 3696b083e353031a496a1f299d8f373270ca562d..efc529e82bc198e7c3c89a5eecb6f929960a8de9 100644
> --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml
> @@ -45,11 +45,11 @@ properties:
>            - const: amd,imageon
>  
>    clocks:
> -    minItems: 2
> +    minItems: 1
>      maxItems: 7
>  
>    clock-names:
> -    minItems: 2
> +    minItems: 1
>      maxItems: 7
>  
>    reg:
> @@ -388,6 +388,33 @@ allOf:
>        required:
>          - clocks
>          - clock-names
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: qcom,adreno-612.0
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 1

Drop, it's implied.


> +          maxItems: 1
> +
> +        clock-names:
> +          items:
> +            - const: core
> +              description: GPU Core clock
> +

Missing constraint for 'reg'.

> +        reg-names:
> +          minItems: 1

Drop. MMIO range is not flexible.

> +          items:
> +            - const: kgsl_3d0_reg_memory
> +            - const: cx_dbgc
> +
Best regards,
Krzysztof