Re: [PATCH] clk: qcom: clk-rpmh: Update the clock suffix for Glymur

[Taniya Das <taniya.das@oss.qualcomm.com>]

On 11/25/2025 11:56 PM, Dmitry Baryshkov wrote:
> On Tue, Nov 25, 2025 at 11:42:39PM +0530, Taniya Das wrote:
>> Update the RPMh VRM clock definitions for Glymur to add the suffix to
>> indicate the clock div and e0 for the C3A_E0, C4A_E0, C5A_E0, and
>> C8A_E0 clock resources.
>>
>> Fixes: ebcb9db98bda ("clk: qcom: rpmh: Add support for Glymur rpmh clocks")
> 
> It's not a bug, there is nothing to fix.
> 

Will remove the fixes tag.

>> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
>> ---
>>  drivers/clk/qcom/clk-rpmh.c | 8 ++++----
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
>> index 1a98b3a0c528c24b600326e6b951b2edb6dcadd7..a370ab2d96c34fa8e7a090e8427b11008318c02f 100644
>> --- a/drivers/clk/qcom/clk-rpmh.c
>> +++ b/drivers/clk/qcom/clk-rpmh.c
>> @@ -390,10 +390,10 @@ DEFINE_CLK_RPMH_VRM(clk7, _a4, "clka7", 4);
>>  
>>  DEFINE_CLK_RPMH_VRM(div_clk1, _div2, "divclka1", 2);
>>  
>> -DEFINE_CLK_RPMH_VRM(clk3, _a, "C3A_E0", 1);
>> -DEFINE_CLK_RPMH_VRM(clk4, _a, "C4A_E0", 1);
>> -DEFINE_CLK_RPMH_VRM(clk5, _a, "C5A_E0", 1);
>> -DEFINE_CLK_RPMH_VRM(clk8, _a, "C8A_E0", 1);
>> +DEFINE_CLK_RPMH_VRM(clk3, _a1_e0, "C3A_E0", 1);
>> +DEFINE_CLK_RPMH_VRM(clk4, _a1_e0, "C4A_E0", 1);
>> +DEFINE_CLK_RPMH_VRM(clk5, _a1_e0, "C5A_E0", 1);
>> +DEFINE_CLK_RPMH_VRM(clk8, _a1_e0, "C8A_E0", 1);
>>  
>>  DEFINE_CLK_RPMH_BCM(ce, "CE0");
>>  DEFINE_CLK_RPMH_BCM(hwkm, "HK0");
>>
>> ---
>> base-commit: 92fd6e84175befa1775e5c0ab682938eca27c0b2
>> change-id: 20251125-glymur_rpmhcc_fix-5daa36a1e8ff
>>
>> Best regards,
>> -- 
>> Taniya Das <taniya.das@oss.qualcomm.com>
>>
> 

-- 
Thanks,
Taniya Das