From: Thomas Pedersen <twp@codeaurora.org>
To: Andy Gross <andy.gross@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, linux@qca.qualcomm.com,
Vinod Koul <vinod.koul@intel.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [RESEND PATCH 1/5] dtbindings: qcom_adm: Fix channel specifiers
Date: Fri, 01 Jul 2016 10:50:51 -0700 [thread overview]
Message-ID: <847cb2110a7980eed819100bd07e2054@codeaurora.org> (raw)
In-Reply-To: <20160629210606.GB16832@hector.attlocal.net>
Hi Andy,
On 2016-06-29 14:06, Andy Gross wrote:
> On Tue, Jun 28, 2016 at 02:43:02PM -0700, Thomas Pedersen wrote:
>> From: Andy Gross <andy.gross@linaro.org>
>>
>> This patch removes the crci information from the dma
>> channel property. At least one client device requires
>> using more than one CRCI value for a channel. This does
>> not match the current binding and the crci information
>> needs to be removed.
>>
>> Instead, the client device will provide this information
>> via other means.
>>
>> Signed-off-by: Andy Gross <andy.gross@linaro.org>
>> Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
>> ---
>> Documentation/devicetree/bindings/dma/qcom_adm.txt | 16
>> ++++++----------
>> 1 file changed, 6 insertions(+), 10 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/dma/qcom_adm.txt
>> b/Documentation/devicetree/bindings/dma/qcom_adm.txt
>> index 9bcab91..38d45f8 100644
>> --- a/Documentation/devicetree/bindings/dma/qcom_adm.txt
>> +++ b/Documentation/devicetree/bindings/dma/qcom_adm.txt
>> @@ -4,8 +4,7 @@ Required properties:
>> - compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960
>> - reg: Address range for DMA registers
>> - interrupts: Should contain one interrupt shared by all channels
>> -- #dma-cells: must be <2>. First cell denotes the channel number.
>> Second cell
>> - denotes CRCI (client rate control interface) flow control
>> assignment.
>> +- #dma-cells: must be <1>. First cell denotes the channel number.
>
> I've actually been thinking more about this. The crci being specified
> in the
> slave config is probably the wrong approach. What we really need is
> each
> physical DMA channel to allow for virtual channels that allow for a
> CRCI setting
> (0 being no flow control). This would require the properties to
> continue to be
> 2 for the dma definition.
AFAICT the cmd-crci and data-crci properties in the NAND controller
client are
really just the slave_id for the DMA engine. Flow control is decided by
some
other heuristic such as whether it's a read/write/etc. command.
> This would also require clients to get multiple references to the same
> DMA
> channel if they require some communications with and without flow
> control.
>
> For NAND, this would mean having two channels for dma. One for flow
> controlled
> and one without.
So the NAND DT would look something like:
dmas = <&adm_dma 3 0>, <%&adm_dma 3 1>;
dma-names = "rxtx", "rxtx_fc";
qcom,cmd-crci = <15>;
qcom,data-crci = <3>;
? We'd still need the cmd-crci and data-crci properties for the
slave_id, unless
I'm confusing something?
Thanks,
--
thomas
next prev parent reply other threads:[~2016-07-01 17:50 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-28 21:43 [RESEND PATCH 0/5] ipq8064 NAND support Thomas Pedersen
2016-06-28 21:43 ` [RESEND PATCH 1/5] dtbindings: qcom_adm: Fix channel specifiers Thomas Pedersen
2016-06-29 21:06 ` Andy Gross
2016-07-01 17:50 ` Thomas Pedersen [this message]
2016-07-01 19:08 ` Andy Gross
2016-07-28 22:16 ` Thomas Pedersen
2016-08-01 20:37 ` Andy Gross
2016-08-04 17:42 ` Thomas Pedersen
2016-06-28 21:43 ` [RESEND PATCH 2/5] dmaengine: Add ADM driver Thomas Pedersen
2016-12-22 17:55 ` [RESEND,2/5] " Zoran Markovic
2016-12-23 19:53 ` Neil Armstrong
2016-12-27 16:51 ` Andy Gross
2016-06-28 21:43 ` [RESEND PATCH 3/5] arm: qcom: dts: ipq8064: Add ADM device node Thomas Pedersen
2016-06-28 21:43 ` [RESEND PATCH 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Thomas Pedersen
2016-06-28 21:43 ` [RESEND PATCH 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform Thomas Pedersen
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