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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b6d5144d565sm459794566b.58.2025.10.24.00.40.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 24 Oct 2025 00:40:46 -0700 (PDT) Message-ID: <853e7cb9-2a7d-445d-aacc-49e3a2f07a66@oss.qualcomm.com> Date: Fri, 24 Oct 2025 09:40:44 +0200 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 5/6] arm64: dts: qcom: qcs615: Add gpu and rgmu nodes To: Akhil P Oommen , Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jie Zhang References: <20251017-qcs615-spin-2-v1-0-0baa44f80905@oss.qualcomm.com> <20251017-qcs615-spin-2-v1-5-0baa44f80905@oss.qualcomm.com> <25ad160b-b618-4ade-a978-e4ae56c79e32@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <25ad160b-b618-4ade-a978-e4ae56c79e32@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=CLknnBrD c=1 sm=1 tr=0 ts=68fb2d80 cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=GWL_uKs5TFOXZ07RABcA:9 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDIzMDExMiBTYWx0ZWRfX9fLJwPGS0kcl sQ/oiooIZ8w7gNv9xI7/IsV5KV84Q8XDfmE72clrCnCUSH2hyp/XnpZFloxmzPEk6K1T0RXIC3m 8mjEiIoRfhT96caG1kvKmi8AgxQDn1zUwVR5/B/wIFxFO1qgUza3rZO5UuqTRJnNtceGO+WNrTB aHEqWoV3rygT/wyeFtt0VBsGLS1pCwdjza4TxNOE4eFHj83R5Y6IYqllcytcpW+g/sLFn9fVTQL MVG/qvN60ahzfWPLPjqXErESQmex0ZFgQWIAOzKu9/oPSk4fKAWNsUsuALKSGDXmbV9RGZ8iwE4 IRTKS+Au6pNDS14+g+PxNikvjr9BtrMD66Mpaw5JIw2Ukn4XxukJ0NEBEoZMR5Adfog9I/zLezB CGQ9BHVOrp81wSdO4yM4JZN1slG9Xg== X-Proofpoint-GUID: GMn_5qFILC6Cffp0s71VQtVjIS-tlj4U X-Proofpoint-ORIG-GUID: GMn_5qFILC6Cffp0s71VQtVjIS-tlj4U X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-23_03,2025-10-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 phishscore=0 bulkscore=0 malwarescore=0 suspectscore=0 clxscore=1015 impostorscore=0 priorityscore=1501 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510230112 On 10/24/25 12:17 AM, Akhil P Oommen wrote: > On 10/22/2025 8:57 PM, Konrad Dybcio wrote: >> On 10/17/25 7:08 PM, Akhil P Oommen wrote: >>> From: Jie Zhang >>> >>> Add gpu and rgmu nodes for qcs615 chipset. >>> >>> Signed-off-by: Jie Zhang >>> Signed-off-by: Akhil P Oommen >>> --- [...] >>> + rgmu: rgmu@506a000 { >>> + compatible = "qcom,adreno-rgmu-612.0", "qcom,adreno-rgmu"; >>> + reg = <0x0 0x0506a000 0x0 0x34000>; >>> + reg-names = "gmu"; >>> + >>> + clocks = <&gpucc GPU_CC_CX_GMU_CLK>, >>> + <&gpucc GPU_CC_CXO_CLK>, >>> + <&gcc GCC_DDRSS_GPU_AXI_CLK>, >>> + <&gcc GCC_GPU_MEMNOC_GFX_CLK>, >>> + <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; >>> + clock-names = "gmu", >>> + "cxo", >>> + "axi", >>> + "memnoc", >>> + "smmu_vote"; >>> + >>> + power-domains = <&gpucc CX_GDSC>, >>> + <&gpucc GX_GDSC>, >>> + <&rpmhpd RPMHPD_CX>; >>> + power-domain-names = "cx", "gx", "vdd_cx"; >> >> I think the gpucc node should reference _CX directly instead, >> then genpd/opp should trickle the requirements up the chain > > Do you mean the CX rail scaling here should be handled by gpucc clk driver? Yes, you can simply add .use_rpm = true to qcom_cc_desc in there and add power-domains = <&rpmhpd RPMHPD_CX> to the node Konrad