From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95BCFC433EF for ; Fri, 13 May 2022 19:04:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241084AbiEMTD7 (ORCPT ); Fri, 13 May 2022 15:03:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383531AbiEMTD6 (ORCPT ); Fri, 13 May 2022 15:03:58 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB9019809E for ; Fri, 13 May 2022 12:03:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1652468634; x=1684004634; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=od5ts7YfisWgOnFB465C5qzUg8Eu9PE/N8z62d9GeWI=; b=KH2C6gcGVPQfyqs1zU4ziExWtZW9aUxZr+UjPaKjD6dPnehwQUMOsG3/ MwiPopMk1wf6XNeNZO9HN9eowsYJjxjooygjy3n2QisYgORyqBkVe9oaL mAbwyn/AEv5XJPmKLRfGFM0CVOFckWYTCZ7lbh7YqEIcIQZVCRMPymK50 M=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 13 May 2022 12:03:53 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 May 2022 12:03:53 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 13 May 2022 12:03:53 -0700 Received: from [10.38.247.112] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 13 May 2022 12:03:51 -0700 Message-ID: <86c52d22-eda6-8a3f-cd21-cf0b89a0581e@quicinc.com> Date: Fri, 13 May 2022 12:03:48 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.2 Subject: Re: [PATCH 16/25] drm/msm/dpu: drop EAGAIN check from dpu_format_populate_layout Content-Language: en-US To: Dmitry Baryshkov , Bjorn Andersson , Rob Clark , Sean Paul CC: Stephen Boyd , David Airlie , Daniel Vetter , , , References: <20220209172520.3719906-1-dmitry.baryshkov@linaro.org> <20220209172520.3719906-17-dmitry.baryshkov@linaro.org> From: Abhinav Kumar In-Reply-To: <20220209172520.3719906-17-dmitry.baryshkov@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 2/9/2022 9:25 AM, Dmitry Baryshkov wrote: > Since layout is not cached anymore, drop comparison against previous > layout and corresponding EAGAIN handling. > > Signed-off-by: Dmitry Baryshkov Isnt this preventing the usermode from programming the same address again? I thought that this check is good in that way and has nothing to do with the caching as such. So its the other way around, by caching we are ensuring that we dont get a new frame update for just updating the same src address. > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 4 ---- > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 5 +---- > 2 files changed, 1 insertion(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c > index 440ae93d7bd1..5c7d739143f0 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c > @@ -927,10 +927,6 @@ int dpu_format_populate_layout( > else > ret = _dpu_format_populate_addrs_linear(aspace, fb, layout); > > - /* check if anything changed */ > - if (!ret && !memcmp(plane_addr, layout->plane_addr, sizeof(plane_addr))) > - ret = -EAGAIN; > - > return ret; > } > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > index a521c0681af6..b2395f02f6d3 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > @@ -1061,10 +1061,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) > memset(&pipe_cfg, 0, sizeof(struct dpu_hw_pipe_cfg)); > > ret = dpu_format_populate_layout(aspace, fb, &layout); > - if (ret == -EAGAIN) { > - DPU_DEBUG_PLANE(pdpu, "not updating same src addrs\n"); > - update_src_addr = false; > - } else if (ret) { > + if (ret) { > DPU_ERROR_PLANE(pdpu, "failed to get format layout, %d\n", ret); > update_src_addr = false; > }