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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aec6ca310ccsm99825266b.85.2025.07.18.03.53.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 18 Jul 2025 03:54:00 -0700 (PDT) Message-ID: <86e14d55-8e96-4a2d-a9e8-a52f0de9dffd@oss.qualcomm.com> Date: Fri, 18 Jul 2025 12:53:56 +0200 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 3/4] arm64: dts: qcom: sa8775p: remove aux clock from pcie phy To: Johan Hovold , Ziyue Zhang Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, jingoohan1@gmail.com, mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org, bhelgaas@google.com, johan+linaro@kernel.org, vkoul@kernel.org, kishon@kernel.org, neil.armstrong@linaro.org, abel.vesa@linaro.org, kw@linux.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, qiang.yu@oss.qualcomm.com, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com References: <20250718081718.390790-1-ziyue.zhang@oss.qualcomm.com> <20250718081718.390790-4-ziyue.zhang@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=ad1hnQot c=1 sm=1 tr=0 ts=687a27ca cx=c_pps a=oc9J++0uMp73DTRD5QyR2A==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=JwSYIlhaqBluAGix--wA:9 a=QEXdDO2ut3YA:10 a=iYH6xdkBrDN1Jqds4HTS:22 X-Proofpoint-ORIG-GUID: SAHvwwjprVp-6tbweGvEOpXu0-betL-X X-Proofpoint-GUID: SAHvwwjprVp-6tbweGvEOpXu0-betL-X X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzE4MDA4NSBTYWx0ZWRfXybAVgb4iM5no Cj4v+MRAGB3k36xTryb5Dbbn4ChfRVzdFlffEfuLLJ0PI02Vb2J3WT5B4Oxiofi9mtZ0/BYkv3m p76SjK2HNAxWKZXWwnBo7uc4O6sMc2biNxaumhHmnSCJtG/T/mTNj0Hpv94eIsKHqE4CCvC+RjY 2YYfZgU0/MbEgu0YNR8LIx52Xw6xFfurL2uJYnCl86obveFbrwSomjHJXOtHZM1oz+1WZMBr/WF giqjPA45oyjSt4ZreJFHyGcoXM5TJpjoQqN6k/mXXDoGQsoIJFrEnjVKuf6UcutXjr1EJ2HNk5B YDaQB6jqgtb+DIn7gR01H4JwTGp0d66RJy/KQtXhWfCxwVaE8v8Kw4QSUk/dkbcJfNWEyuPR6wv ak3WqYsG7b8lN5KqNn2KXOE54nTDt4MQwzl+8PAcuD6zwU11KXMbijcaj40tvtE+35UxMS+W X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-18_02,2025-07-17_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 bulkscore=0 mlxlogscore=999 suspectscore=0 spamscore=0 malwarescore=0 phishscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507180085 On 7/18/25 12:02 PM, Johan Hovold wrote: > On Fri, Jul 18, 2025 at 04:17:17PM +0800, Ziyue Zhang wrote: >> gcc_aux_clk is used in PCIe RC and it is not required in pcie phy, in >> pcie phy it should be gcc_phy_aux_clk, so remove gcc_aux_clk and >> replace it with gcc_phy_aux_clk. > > Expanding on why this is a correct change would be good since this does > not yet seem to have been fully resolved: > > https://lore.kernel.org/lkml/98088092-1987-41cc-ab70-c9a5d3fdbb41@oss.qualcomm.com/ I dug out some deep memories and recalled that _PHY_AUX_CLK was necessary on x1e for the Gen4 PHY to initialize properly. This can be easily reproduced: diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index a9a7bb676c6f..d5ef6bef2b23 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -3312,7 +3312,7 @@ pcie3_phy: phy@1be0000 { compatible = "qcom,x1e80100-qmp-gen4x8-pcie-phy"; reg = <0 0x01be0000 0 0x10000>; - clocks = <&gcc GCC_PCIE_3_PHY_AUX_CLK>, + clocks = <&gcc GCC_PCIE_3_AUX_CLK>, <&gcc GCC_PCIE_3_CFG_AHB_CLK>, <&tcsr TCSR_PCIE_8L_CLKREF_EN>, <&gcc GCC_PCIE_3_PHY_RCHNG_CLK>, ==> [ 6.967231] qcom-qmp-pcie-phy 1be0000.phy: phy initialization timed-out [ 6.974462] phy phy-1be0000.phy.0: phy poweron failed --> -110 And the (non-PHY_)AUX_CLK is necessary for at least one of them, as removing it causes a crash on boot Konrad