Re: [PATCH] arm64: dts: qcom: x1e80100: Add performance hint for boost clock

[Marc Zyngier <maz@kernel.org>]

On Fri, 25 Oct 2024 04:12:58 +0100,
Jiajie Chen <c@jia.je> wrote:
> 
> The x1e80100 CPU can have up to two cores running at 4.0 GHz, with one
> core in the second cluster (cores 4-7) and the other in the third
> cluster (cores 8-11). However, the scheduler is currently unaware of
> this, leading to scenarios where a single core benchmark might run at
> 3.4 GHz when scheduled to the first cluster.
> 
> This patch introduces capacity-dmips-mhz nodes to each CPU node in the
> DTS. For cores numbered 4 and 8, the capacities are set to 1200, while
> others are set to 1024. This ensures that the two cores can be
> prioritized for scheduling. The value 1200 is derived from approximately
> `1024/3.4*4.0`.
> 
> Note that capacity-dmips-mhz is not ideally suited for this purpose, as
> it was designed to differentiate between performance and efficient
> cores, not for core boosting. According to its definition, DMIPS/MHz
> actually decreases with higher frequencies. However, since the CPU does
> not support AMU, and no elegant solution was found, this approach is
> used as a workaround.

Are you sure?

[    0.570323] CPU features: detected: Activity Monitors Unit (AMU) on CPU0-11

So activity monitors are available. Not that what you have here is not
useful, but this comment seems a bit... surprising.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.