[PATCH V1 0/3] X1E001DE Devkit remaining features

[PATCH V1 0/3] X1E001DE Devkit remaining features

[Sibi Sankar]

This series adds 3.5mm jack, sd-card and external display support to the
X1E001DE Devkit.

PS: The ext display patch 3 needs pin-conf and updates from comments on
    the list. Just included it in the series so that people can get
    display up. Type c to DP was tested on all ports with [1] as the
    base branch.

[1] https://git.codelinaro.org/abel.vesa/linux/-/commits/x1e-next-20240930

Sibi Sankar (3):
  arm64: dts: qcom: x1e001de-devkit: Add audio related nodes
  arm64: dts: qcom: x1e001de-devkit: Enable SD card support
  arm64: dts: qcom: x1e001de-devkit: Enable external DP support

 arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 561 ++++++++++++++++++-
 1 file changed, 555 insertions(+), 6 deletions(-)

-- 
2.34.1

[PATCH V1 1/3] arm64: dts: qcom: x1e001de-devkit: Add audio related nodes

[Sibi Sankar]

The x1e001de devkit devices are expected to ship without external
speaker/mic connected, so just enable headphone jack on it.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
---
 arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 97 ++++++++++++++++++++
 1 file changed, 97 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
index d31e78a8027a..432ffefc525a 100644
--- a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
+++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
@@ -19,6 +19,32 @@ aliases {
 		serial0 = &uart21;
 	};
 
+	wcd938x: audio-codec {
+		compatible = "qcom,wcd9385-codec";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&wcd_default>;
+
+		qcom,micbias1-microvolt = <1800000>;
+		qcom,micbias2-microvolt = <1800000>;
+		qcom,micbias3-microvolt = <1800000>;
+		qcom,micbias4-microvolt = <1800000>;
+		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
+		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
+		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
+		qcom,rx-device = <&wcd_rx>;
+		qcom,tx-device = <&wcd_tx>;
+
+		reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>;
+
+		vdd-buck-supply = <&vreg_l15b_1p8>;
+		vdd-rxtx-supply = <&vreg_l15b_1p8>;
+		vdd-io-supply = <&vreg_l15b_1p8>;
+		vdd-mic-bias-supply = <&vreg_bob1>;
+
+		#sound-dai-cells = <1>;
+	};
+
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
@@ -130,6 +156,47 @@ linux,cma {
 		};
 	};
 
+	sound {
+		compatible = "qcom,x1e80100-sndcard";
+		model = "X1E001DE-DEVKIT";
+		audio-routing = "IN1_HPHL", "HPHL_OUT",
+				"IN2_HPHR", "HPHR_OUT",
+				"AMIC2", "MIC BIAS2",
+				"TX SWR_INPUT1", "ADC2_OUTPUT";
+
+		wcd-playback-dai-link {
+			link-name = "WCD Playback";
+
+			cpu {
+				sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
+			};
+
+			codec {
+				sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>;
+			};
+
+			platform {
+				sound-dai = <&q6apm>;
+			};
+		};
+
+		wcd-capture-dai-link {
+			link-name = "WCD Capture";
+
+			cpu {
+				sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
+			};
+
+			codec {
+				sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>;
+			};
+
+			platform {
+				sound-dai = <&q6apm>;
+			};
+		};
+	};
+
 	vreg_nvme: regulator-nvme {
 		compatible = "regulator-fixed";
 
@@ -624,6 +691,28 @@ &smb2360_2_eusb2_repeater {
 	vdd3-supply = <&vreg_l8b_3p0>;
 };
 
+&swr1 {
+	status = "okay";
+
+	/* WCD9385 RX */
+	wcd_rx: codec@0,4 {
+		compatible = "sdw20217010d00";
+		reg = <0 4>;
+		qcom,rx-port-mapping = <1 2 3 4 5>;
+	};
+};
+
+&swr2 {
+	status = "okay";
+
+	/* WCD9385 TX */
+	wcd_tx: codec@0,3 {
+		compatible = "sdw20217010d00";
+		reg = <0 3>;
+		qcom,tx-port-mapping = <2 2 3 4>;
+	};
+};
+
 &tlmm {
 	gpio-reserved-ranges = <44 4>; /* SPI (TPM) */
 
@@ -703,6 +792,14 @@ wake-n-pins {
 		};
 	};
 
+	wcd_default: wcd-reset-n-active-state {
+		pins = "gpio191";
+		function = "gpio";
+		drive-strength = <16>;
+		bias-disable;
+		output-low;
+	};
+
 	wwan_sw_en: wwan-sw-en-state {
 		pins = "gpio221";
 		function = "gpio";
-- 
2.34.1

[PATCH V1 2/3] arm64: dts: qcom: x1e001de-devkit: Enable SD card support

[Sibi Sankar]

The SD card slot found on the X1E001DE Snapdragon Devkit for windows
board is controlled by SDC2 instance, so enable it.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
---
 arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
index 432ffefc525a..f169714abcd3 100644
--- a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
+++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
@@ -672,6 +672,19 @@ &remoteproc_cdsp {
 	status = "okay";
 };
 
+&sdhc_2 {
+	cd-gpios = <&tlmm 71 GPIO_ACTIVE_LOW>;
+	pinctrl-0 = <&sdc2_default &sdc2_card_det_n>;
+	pinctrl-1 = <&sdc2_sleep &sdc2_card_det_n>;
+	pinctrl-names = "default", "sleep";
+	vmmc-supply = <&vreg_l9b_2p9>;
+	vqmmc-supply = <&vreg_l6b_1p8>;
+	bus-width = <4>;
+	no-sdio;
+	no-mmc;
+	status = "okay";
+};
+
 &smb2360_0_eusb2_repeater {
 	vdd18-supply = <&vreg_l3d_1p8>;
 	vdd3-supply = <&vreg_l2b_3p0>;
@@ -792,6 +805,13 @@ wake-n-pins {
 		};
 	};
 
+	sdc2_card_det_n: sdc2-card-det-state {
+		pins = "gpio71";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+
 	wcd_default: wcd-reset-n-active-state {
 		pins = "gpio191";
 		function = "gpio";
-- 
2.34.1

[PATCH V1 3/3] arm64: dts: qcom: x1e001de-devkit: Enable external DP support

[Sibi Sankar]

The Qualcomm Snapdragon X Elite Devkit for Windows has the same
configuration as the CRD variant i.e. all 3 of the type C ports
support external DP altmode. Add all the nodes needed to enable
them.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
---

PS: The ext display patch 3 needs pin-conf and updates from comments on
    the list. Just included it in the series so that people can get
    display up. Type c to DP was tested on all ports with [1] as the
    base branch.

[1] https://git.codelinaro.org/abel.vesa/linux/-/commits/x1e-next-20240930

 arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 444 ++++++++++++++++++-
 1 file changed, 438 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
index f169714abcd3..a1dc29a3a05e 100644
--- a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
+++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
@@ -82,7 +82,15 @@ port@1 {
 					reg = <1>;
 
 					pmic_glink_ss0_ss_in: endpoint {
-						remote-endpoint = <&usb_1_ss0_qmpphy_out>;
+						remote-endpoint = <&retimer_ss0_ss_out>;
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+
+					pmic_glink_ss0_con_sbu_in: endpoint {
+						remote-endpoint = <&retimer_ss0_con_sbu_out>;
 					};
 				};
 			};
@@ -111,7 +119,15 @@ port@1 {
 					reg = <1>;
 
 					pmic_glink_ss1_ss_in: endpoint {
-						remote-endpoint = <&usb_1_ss1_qmpphy_out>;
+						remote-endpoint = <&retimer_ss1_ss_out>;
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+
+					pmic_glink_ss1_con_sbu_in: endpoint {
+						remote-endpoint = <&retimer_ss1_con_sbu_out>;
 					};
 				};
 			};
@@ -140,7 +156,15 @@ port@1 {
 					reg = <1>;
 
 					pmic_glink_ss2_ss_in: endpoint {
-						remote-endpoint = <&usb_1_ss2_qmpphy_out>;
+						remote-endpoint = <&retimer_ss2_ss_out>;
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+
+					pmic_glink_ss2_con_sbu_in: endpoint {
+						remote-endpoint = <&retimer_ss2_con_sbu_out>;
 					};
 				};
 			};
@@ -213,6 +237,150 @@ vreg_nvme: regulator-nvme {
 		regulator-boot-on;
 	};
 
+	vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "VREG_RTMR0_1P15";
+		regulator-min-microvolt = <1150000>;
+		regulator-max-microvolt = <1150000>;
+
+		gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		pinctrl-0 = <&usb0_pwr_1p15_en>;
+		pinctrl-names = "default";
+
+		regulator-boot-on;
+	};
+
+	vreg_rtmr0_1p8: regulator-rtmr0-1p8 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "VREG_RTMR0_1P8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+
+		gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		pinctrl-0 = <&usb0_1p8_reg_en>;
+		pinctrl-names = "default";
+
+		regulator-boot-on;
+	};
+
+	vreg_rtmr0_3p3: regulator-rtmr0-3p3 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "VREG_RTMR0_3P3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		pinctrl-0 = <&usb0_3p3_reg_en>;
+		pinctrl-names = "default";
+
+		regulator-boot-on;
+	};
+
+	vreg_rtmr1_1p15: regulator-rtmr1-1p15 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "VREG_RTMR1_1P15";
+		regulator-min-microvolt = <1150000>;
+		regulator-max-microvolt = <1150000>;
+
+		gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		pinctrl-0 = <&rtmr1_1p15_reg_en>;
+		pinctrl-names = "default";
+
+		regulator-boot-on;
+	};
+
+	vreg_rtmr1_1p8: regulator-rtmr1-1p8 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "VREG_RTMR1_1P8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+
+		gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		pinctrl-0 = <&rtmr1_1p8_reg_en>;
+		pinctrl-names = "default";
+
+		regulator-boot-on;
+	};
+
+	vreg_rtmr1_3p3: regulator-rtmr1-3p3 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "VREG_RTMR1_3P3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		pinctrl-0 = <&rtmr1_3p3_reg_en>;
+		pinctrl-names = "default";
+
+		regulator-boot-on;
+	};
+
+	vreg_rtmr2_1p15: regulator-rtmr2-1p15 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "VREG_RTMR2_1P15";
+		regulator-min-microvolt = <1150000>;
+		regulator-max-microvolt = <1150000>;
+
+		gpio = <&tlmm 189 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		pinctrl-0 = <&rtmr2_1p15_reg_en>;
+		pinctrl-names = "default";
+
+		regulator-boot-on;
+	};
+
+	vreg_rtmr2_1p8: regulator-rtmr2-1p8 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "VREG_RTMR2_1P8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+
+		gpio = <&tlmm 126 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		pinctrl-0 = <&rtmr2_1p8_reg_en>;
+		pinctrl-names = "default";
+
+		regulator-boot-on;
+	};
+
+	vreg_rtmr2_3p3: regulator-rtmr2-3p3 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "VREG_RTMR2_3P3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpio = <&tlmm 187 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		pinctrl-0 = <&rtmr2_3p3_reg_en>;
+		pinctrl-names = "default";
+
+		regulator-boot-on;
+	};
+
 	vph_pwr: regulator-vph-pwr {
 		compatible = "regulator-fixed";
 
@@ -591,6 +759,207 @@ vreg_l3j_0p8: ldo3 {
 	};
 };
 
+&gpu {
+	status = "okay";
+
+	zap-shader {
+		firmware-name = "qcom/x1e80100/Thundercomm/DEVKIT/qcdxkmsuc8380.mbn";
+	};
+};
+
+&i2c1 {
+	clock-frequency = <400000>;
+
+	status = "okay";
+
+	typec-mux@8 {
+		compatible = "parade,ps8830";
+		reg = <0x08>;
+
+		clocks = <&rpmhcc RPMH_RF_CLK5>;
+		clock-names = "xo";
+
+		vdd-supply = <&vreg_rtmr2_1p15>;
+		vdd33-supply = <&vreg_rtmr2_3p3>;
+		vdd33-cap-supply = <&vreg_rtmr2_3p3>;
+		vddar-supply = <&vreg_rtmr2_1p15>;
+		vddat-supply = <&vreg_rtmr2_1p15>;
+		vddio-supply = <&vreg_rtmr2_1p8>;
+
+		reset-gpios = <&tlmm 185 GPIO_ACTIVE_HIGH>;
+
+		orientation-switch;
+		retimer-switch;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				retimer_ss2_ss_out: endpoint {
+					remote-endpoint = <&pmic_glink_ss2_ss_in>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+
+				retimer_ss2_ss_in: endpoint {
+					remote-endpoint = <&usb_1_ss2_qmpphy_out>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+
+				retimer_ss2_con_sbu_out: endpoint {
+					remote-endpoint = <&pmic_glink_ss2_con_sbu_in>;
+				};
+			};
+		};
+	};
+};
+
+&i2c3 {
+	clock-frequency = <400000>;
+
+	status = "okay";
+
+	typec-mux@8 {
+		compatible = "parade,ps8830";
+		reg = <0x08>;
+
+		clocks = <&rpmhcc RPMH_RF_CLK3>;
+		clock-names = "xo";
+
+		vdd-supply = <&vreg_rtmr0_1p15>;
+		vdd33-supply = <&vreg_rtmr0_3p3>;
+		vdd33-cap-supply = <&vreg_rtmr0_3p3>;
+		vddar-supply = <&vreg_rtmr0_1p15>;
+		vddat-supply = <&vreg_rtmr0_1p15>;
+		vddio-supply = <&vreg_rtmr0_1p8>;
+
+		reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_HIGH>;
+
+		retimer-switch;
+		orientation-switch;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				retimer_ss0_ss_out: endpoint {
+					remote-endpoint = <&pmic_glink_ss0_ss_in>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+
+				retimer_ss0_ss_in: endpoint {
+					remote-endpoint = <&usb_1_ss0_qmpphy_out>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+
+				retimer_ss0_con_sbu_out: endpoint {
+					remote-endpoint = <&pmic_glink_ss0_con_sbu_in>;
+				};
+			};
+		};
+	};
+};
+
+&i2c7 {
+	clock-frequency = <400000>;
+
+	status = "okay";
+
+	typec-mux@8 {
+		compatible = "parade,ps8830";
+		reg = <0x8>;
+
+		clocks = <&rpmhcc RPMH_RF_CLK4>;
+		clock-names = "xo";
+
+		vdd-supply = <&vreg_rtmr1_1p15>;
+		vdd33-supply = <&vreg_rtmr1_3p3>;
+		vdd33-cap-supply = <&vreg_rtmr1_3p3>;
+		vddar-supply = <&vreg_rtmr1_1p15>;
+		vddat-supply = <&vreg_rtmr1_1p15>;
+		vddio-supply = <&vreg_rtmr1_1p8>;
+
+		reset-gpios = <&tlmm 176 GPIO_ACTIVE_HIGH>;
+
+		retimer-switch;
+		orientation-switch;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				retimer_ss1_ss_out: endpoint {
+					remote-endpoint = <&pmic_glink_ss1_ss_in>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+
+				retimer_ss1_ss_in: endpoint {
+					remote-endpoint = <&usb_1_ss1_qmpphy_out>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+
+				retimer_ss1_con_sbu_out: endpoint {
+					remote-endpoint = <&pmic_glink_ss1_con_sbu_in>;
+				};
+			};
+		};
+	};
+};
+
+&mdss {
+	status = "okay";
+};
+
+&mdss_dp0 {
+	status = "okay";
+};
+
+&mdss_dp0_out {
+	data-lanes = <0 1>;
+};
+
+&mdss_dp1 {
+	status = "okay";
+};
+
+&mdss_dp1_out {
+	data-lanes = <0 1>;
+};
+
+&mdss_dp2 {
+	status = "okay";
+};
+
+&mdss_dp2_out {
+	data-lanes = <0 1>;
+};
+
 &pcie4 {
 	perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
 	wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
@@ -646,6 +1015,27 @@ &pcie6a_phy {
 	status = "okay";
 };
 
+&pm8550_gpios {
+	usb0_3p3_reg_en: usb0-3p3-reg-en-state {
+		pins = "gpio11";
+		function = "normal";
+	};
+};
+
+&pmc8380_5_gpios {
+	usb0_pwr_1p15_en: usb0-pwr-1p15-en-state {
+		pins = "gpio8";
+		function = "normal";
+	};
+};
+
+&pm8550ve_9_gpios {
+	usb0_1p8_reg_en: usb0-1p8-reg-en-state {
+		pins = "gpio8";
+		function = "normal";
+	};
+};
+
 &qupv3_0 {
 	status = "okay";
 };
@@ -805,6 +1195,48 @@ wake-n-pins {
 		};
 	};
 
+	rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state {
+		pins = "gpio188";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-disable;
+	};
+
+	rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state {
+		pins = "gpio175";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-disable;
+	};
+
+	rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state {
+		pins = "gpio186";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-disable;
+	};
+
+	rtmr2_1p15_reg_en: rtmr2-1p15-reg-en-state {
+		pins = "gpio189";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-disable;
+	};
+
+	rtmr2_1p8_reg_en: rtmr2-1p8-reg-en-state {
+		pins = "gpio126";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-disable;
+	};
+
+	rtmr2_3p3_reg_en: rtmr2-3p3-reg-en-state {
+		pins = "gpio187";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-disable;
+	};
+
 	sdc2_card_det_n: sdc2-card-det-state {
 		pins = "gpio71";
 		function = "gpio";
@@ -863,7 +1295,7 @@ &usb_1_ss0_dwc3_hs {
 };
 
 &usb_1_ss0_qmpphy_out {
-	remote-endpoint = <&pmic_glink_ss0_ss_in>;
+	remote-endpoint = <&retimer_ss0_ss_in>;
 };
 
 &usb_1_ss1_hsphy {
@@ -895,7 +1327,7 @@ &usb_1_ss1_dwc3_hs {
 };
 
 &usb_1_ss1_qmpphy_out {
-	remote-endpoint = <&pmic_glink_ss1_ss_in>;
+	remote-endpoint = <&retimer_ss1_ss_in>;
 };
 
 &usb_1_ss2_hsphy {
@@ -927,5 +1359,5 @@ &usb_1_ss2_dwc3_hs {
 };
 
 &usb_1_ss2_qmpphy_out {
-	remote-endpoint = <&pmic_glink_ss2_ss_in>;
+	remote-endpoint = <&retimer_ss2_ss_in>;
 };
-- 
2.34.1

Re: [PATCH V1 2/3] arm64: dts: qcom: x1e001de-devkit: Enable SD card support

[Marc Zyngier]

On Fri, 25 Oct 2024 13:35:50 +0100,
Sibi Sankar <quic_sibis@quicinc.com> wrote:
> 
> The SD card slot found on the X1E001DE Snapdragon Devkit for windows
> board is controlled by SDC2 instance, so enable it.
> 
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
> index 432ffefc525a..f169714abcd3 100644
> --- a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
> +++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
> @@ -672,6 +672,19 @@ &remoteproc_cdsp {
>  	status = "okay";
>  };
>  
> +&sdhc_2 {

It doesn't look like this path exists in the upstream dtsi. I guess
this applies on top of another series that isn't exclusively
targeting the devkit?

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

Re: [PATCH V1 2/3] arm64: dts: qcom: x1e001de-devkit: Enable SD card support

[Konrad Dybcio]

On 30.10.2024 4:52 PM, Marc Zyngier wrote:
> On Fri, 25 Oct 2024 13:35:50 +0100,
> Sibi Sankar <quic_sibis@quicinc.com> wrote:
>>
>> The SD card slot found on the X1E001DE Snapdragon Devkit for windows
>> board is controlled by SDC2 instance, so enable it.
>>
>> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
>> ---
>>  arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 20 ++++++++++++++++++++
>>  1 file changed, 20 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
>> index 432ffefc525a..f169714abcd3 100644
>> --- a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
>> +++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
>> @@ -672,6 +672,19 @@ &remoteproc_cdsp {
>>  	status = "okay";
>>  };
>>  
>> +&sdhc_2 {
> 
> It doesn't look like this path exists in the upstream dtsi. I guess
> this applies on top of another series that isn't exclusively
> targeting the devkit?

<20241022-x1e80100-qcp-sdhc-v3-0-46c401e32cbf@linaro.org>

Konrad

Re: [PATCH V1 2/3] arm64: dts: qcom: x1e001de-devkit: Enable SD card support

[Konrad Dybcio]

On 25.10.2024 2:35 PM, Sibi Sankar wrote:
> The SD card slot found on the X1E001DE Snapdragon Devkit for windows
> board is controlled by SDC2 instance, so enable it.
> 
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

Re: [PATCH V1 0/3] X1E001DE Devkit remaining features

[Bjorn Andersson]

On Fri, 25 Oct 2024 18:05:48 +0530, Sibi Sankar wrote:
> This series adds 3.5mm jack, sd-card and external display support to the
> X1E001DE Devkit.
> 
> PS: The ext display patch 3 needs pin-conf and updates from comments on
>     the list. Just included it in the series so that people can get
>     display up. Type c to DP was tested on all ports with [1] as the
>     base branch.
> 
> [...]

Applied, thanks!

[1/3] arm64: dts: qcom: x1e001de-devkit: Add audio related nodes
      commit: 3844a8682e55813a6ad02d14f5862d7a73f9dc22
[2/3] arm64: dts: qcom: x1e001de-devkit: Enable SD card support
      (no commit info)
[3/3] arm64: dts: qcom: x1e001de-devkit: Enable external DP support
      commit: 019e1ee32fec24a69e3491d27eb0f1bedce12525

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

Re: (subset) [PATCH V1 0/3] X1E001DE Devkit remaining features

[Bjorn Andersson]

On Fri, 25 Oct 2024 18:05:48 +0530, Sibi Sankar wrote:
> This series adds 3.5mm jack, sd-card and external display support to the
> X1E001DE Devkit.
> 
> PS: The ext display patch 3 needs pin-conf and updates from comments on
>     the list. Just included it in the series so that people can get
>     display up. Type c to DP was tested on all ports with [1] as the
>     base branch.
> 
> [...]

Applied, thanks!

[2/3] arm64: dts: qcom: x1e001de-devkit: Enable SD card support
      commit: c074fc2220eb1f9f3a4dd3d5322cacb553d3ce7f

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

Re: [PATCH V1 3/3] arm64: dts: qcom: x1e001de-devkit: Enable external DP support

[Rob Herring]

On Fri, Oct 25, 2024 at 7:36 AM Sibi Sankar <quic_sibis@quicinc.com> wrote:
>
> The Qualcomm Snapdragon X Elite Devkit for Windows has the same
> configuration as the CRD variant i.e. all 3 of the type C ports
> support external DP altmode. Add all the nodes needed to enable
> them.
>
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
>
> PS: The ext display patch 3 needs pin-conf and updates from comments on
>     the list. Just included it in the series so that people can get
>     display up. Type c to DP was tested on all ports with [1] as the
>     base branch.
>
> [1] https://git.codelinaro.org/abel.vesa/linux/-/commits/x1e-next-20240930
>
>  arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 444 ++++++++++++++++++-
>  1 file changed, 438 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
> index f169714abcd3..a1dc29a3a05e 100644
> --- a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
> +++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
> @@ -82,7 +82,15 @@ port@1 {
>                                         reg = <1>;
>
>                                         pmic_glink_ss0_ss_in: endpoint {
> -                                               remote-endpoint = <&usb_1_ss0_qmpphy_out>;
> +                                               remote-endpoint = <&retimer_ss0_ss_out>;
> +                                       };
> +                               };
> +
> +                               port@2 {
> +                                       reg = <2>;
> +
> +                                       pmic_glink_ss0_con_sbu_in: endpoint {
> +                                               remote-endpoint = <&retimer_ss0_con_sbu_out>;
>                                         };
>                                 };
>                         };
> @@ -111,7 +119,15 @@ port@1 {
>                                         reg = <1>;
>
>                                         pmic_glink_ss1_ss_in: endpoint {
> -                                               remote-endpoint = <&usb_1_ss1_qmpphy_out>;
> +                                               remote-endpoint = <&retimer_ss1_ss_out>;
> +                                       };
> +                               };
> +
> +                               port@2 {
> +                                       reg = <2>;
> +
> +                                       pmic_glink_ss1_con_sbu_in: endpoint {
> +                                               remote-endpoint = <&retimer_ss1_con_sbu_out>;
>                                         };
>                                 };
>                         };
> @@ -140,7 +156,15 @@ port@1 {
>                                         reg = <1>;
>
>                                         pmic_glink_ss2_ss_in: endpoint {
> -                                               remote-endpoint = <&usb_1_ss2_qmpphy_out>;
> +                                               remote-endpoint = <&retimer_ss2_ss_out>;
> +                                       };
> +                               };
> +
> +                               port@2 {
> +                                       reg = <2>;
> +
> +                                       pmic_glink_ss2_con_sbu_in: endpoint {
> +                                               remote-endpoint = <&retimer_ss2_con_sbu_out>;
>                                         };
>                                 };
>                         };
> @@ -213,6 +237,150 @@ vreg_nvme: regulator-nvme {
>                 regulator-boot-on;
>         };
>
> +       vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
> +               compatible = "regulator-fixed";
> +
> +               regulator-name = "VREG_RTMR0_1P15";
> +               regulator-min-microvolt = <1150000>;
> +               regulator-max-microvolt = <1150000>;
> +
> +               gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>;
> +               enable-active-high;
> +
> +               pinctrl-0 = <&usb0_pwr_1p15_en>;
> +               pinctrl-names = "default";
> +
> +               regulator-boot-on;
> +       };
> +
> +       vreg_rtmr0_1p8: regulator-rtmr0-1p8 {
> +               compatible = "regulator-fixed";
> +
> +               regulator-name = "VREG_RTMR0_1P8";
> +               regulator-min-microvolt = <1800000>;
> +               regulator-max-microvolt = <1800000>;
> +
> +               gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>;
> +               enable-active-high;
> +
> +               pinctrl-0 = <&usb0_1p8_reg_en>;
> +               pinctrl-names = "default";
> +
> +               regulator-boot-on;
> +       };
> +
> +       vreg_rtmr0_3p3: regulator-rtmr0-3p3 {
> +               compatible = "regulator-fixed";
> +
> +               regulator-name = "VREG_RTMR0_3P3";
> +               regulator-min-microvolt = <3300000>;
> +               regulator-max-microvolt = <3300000>;
> +
> +               gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>;
> +               enable-active-high;
> +
> +               pinctrl-0 = <&usb0_3p3_reg_en>;
> +               pinctrl-names = "default";
> +
> +               regulator-boot-on;
> +       };
> +
> +       vreg_rtmr1_1p15: regulator-rtmr1-1p15 {
> +               compatible = "regulator-fixed";
> +
> +               regulator-name = "VREG_RTMR1_1P15";
> +               regulator-min-microvolt = <1150000>;
> +               regulator-max-microvolt = <1150000>;
> +
> +               gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>;
> +               enable-active-high;
> +
> +               pinctrl-0 = <&rtmr1_1p15_reg_en>;
> +               pinctrl-names = "default";
> +
> +               regulator-boot-on;
> +       };
> +
> +       vreg_rtmr1_1p8: regulator-rtmr1-1p8 {
> +               compatible = "regulator-fixed";
> +
> +               regulator-name = "VREG_RTMR1_1P8";
> +               regulator-min-microvolt = <1800000>;
> +               regulator-max-microvolt = <1800000>;
> +
> +               gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>;
> +               enable-active-high;
> +
> +               pinctrl-0 = <&rtmr1_1p8_reg_en>;
> +               pinctrl-names = "default";
> +
> +               regulator-boot-on;
> +       };
> +
> +       vreg_rtmr1_3p3: regulator-rtmr1-3p3 {
> +               compatible = "regulator-fixed";
> +
> +               regulator-name = "VREG_RTMR1_3P3";
> +               regulator-min-microvolt = <3300000>;
> +               regulator-max-microvolt = <3300000>;
> +
> +               gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>;
> +               enable-active-high;
> +
> +               pinctrl-0 = <&rtmr1_3p3_reg_en>;
> +               pinctrl-names = "default";
> +
> +               regulator-boot-on;
> +       };
> +
> +       vreg_rtmr2_1p15: regulator-rtmr2-1p15 {
> +               compatible = "regulator-fixed";
> +
> +               regulator-name = "VREG_RTMR2_1P15";
> +               regulator-min-microvolt = <1150000>;
> +               regulator-max-microvolt = <1150000>;
> +
> +               gpio = <&tlmm 189 GPIO_ACTIVE_HIGH>;
> +               enable-active-high;
> +
> +               pinctrl-0 = <&rtmr2_1p15_reg_en>;
> +               pinctrl-names = "default";
> +
> +               regulator-boot-on;
> +       };
> +
> +       vreg_rtmr2_1p8: regulator-rtmr2-1p8 {
> +               compatible = "regulator-fixed";
> +
> +               regulator-name = "VREG_RTMR2_1P8";
> +               regulator-min-microvolt = <1800000>;
> +               regulator-max-microvolt = <1800000>;
> +
> +               gpio = <&tlmm 126 GPIO_ACTIVE_HIGH>;
> +               enable-active-high;
> +
> +               pinctrl-0 = <&rtmr2_1p8_reg_en>;
> +               pinctrl-names = "default";
> +
> +               regulator-boot-on;
> +       };
> +
> +       vreg_rtmr2_3p3: regulator-rtmr2-3p3 {
> +               compatible = "regulator-fixed";
> +
> +               regulator-name = "VREG_RTMR2_3P3";
> +               regulator-min-microvolt = <3300000>;
> +               regulator-max-microvolt = <3300000>;
> +
> +               gpio = <&tlmm 187 GPIO_ACTIVE_HIGH>;
> +               enable-active-high;
> +
> +               pinctrl-0 = <&rtmr2_3p3_reg_en>;
> +               pinctrl-names = "default";
> +
> +               regulator-boot-on;
> +       };
> +
>         vph_pwr: regulator-vph-pwr {
>                 compatible = "regulator-fixed";
>
> @@ -591,6 +759,207 @@ vreg_l3j_0p8: ldo3 {
>         };
>  };
>
> +&gpu {
> +       status = "okay";
> +
> +       zap-shader {
> +               firmware-name = "qcom/x1e80100/Thundercomm/DEVKIT/qcdxkmsuc8380.mbn";
> +       };
> +};
> +
> +&i2c1 {
> +       clock-frequency = <400000>;
> +
> +       status = "okay";
> +
> +       typec-mux@8 {
> +               compatible = "parade,ps8830";
> +               reg = <0x08>;
> +
> +               clocks = <&rpmhcc RPMH_RF_CLK5>;
> +               clock-names = "xo";

clock-names is not part of the binding and dtbs_checks now complains.

Rob