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From: Felipe Balbi <balbi-l0cyMroinI0@public.gmane.org>
To: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Greg KH
	<gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>,
	Andy Gross <agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Subject: Re: [PATCH 2/4] usb: dwc3: qcom: Configure TCSR phy mux register
Date: Fri, 20 Nov 2015 09:06:33 -0600	[thread overview]
Message-ID: <87a8q8emme.fsf@saruman.tx.rr.com> (raw)
In-Reply-To: <1448008509-8913-3-git-send-email-agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>

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Hi,

Andy Gross <agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> writes:
> This patch adds automatic configuration of the TCSR phy mux register based on
> the syscon-tcsr devicetree entry.  This configuration is optional, as some
> platforms may not require the mux selection.
>
> Signed-off-by: Andy Gross <agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>

just when I find a way to make a generic dwc3-of-simple.c glue layer :-p

I can, certainly drop my patches but I need more details on the syscon
usage below.

> ---
>  drivers/usb/dwc3/dwc3-qcom.c | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
>
> diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
> index 0880260..fcf264c 100644
> --- a/drivers/usb/dwc3/dwc3-qcom.c
> +++ b/drivers/usb/dwc3/dwc3-qcom.c
> @@ -17,6 +17,8 @@
>  #include <linux/of.h>
>  #include <linux/of_platform.h>
>  #include <linux/platform_device.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/regmap.h>
>  
>  struct dwc3_qcom {
>  	struct device		*dev;
> @@ -30,6 +32,9 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
>  {
>  	struct device_node *node = pdev->dev.of_node;
>  	struct dwc3_qcom *qdwc;
> +	struct regmap *regmap;
> +	u32 mux_offset;
> +	u32 mux_bit;
>  	int ret;
>  
>  	qdwc = devm_kzalloc(&pdev->dev, sizeof(*qdwc), GFP_KERNEL);
> @@ -58,6 +63,26 @@ static int dwc3_qcom_probe(struct platform_device *pdev)
>  		qdwc->sleep_clk = NULL;
>  	}
>  
> +	/* look for tcsr and if present, provision it */
> +	regmap = syscon_regmap_lookup_by_phandle(node, "syscon-tcsr");
> +	if (!IS_ERR(regmap)) {
> +		if (of_property_read_u32_index(node, "syscon-tcsr", 1,
> +					       &mux_offset)) {
> +			dev_err(qdwc->dev, "missing USB TCSR mux offset\n");
> +			return -EINVAL;
> +		}
> +		if (of_property_read_u32_index(node, "syscon-tcsr", 2,
> +					       &mux_bit)) {
> +			dev_err(qdwc->dev, "missing USB TCSR mux bit\n");
> +			return -EINVAL;
> +		}
> +
> +		regmap_update_bits(regmap, mux_offset, BIT(mux_bit),
> +				   BIT(mux_bit));

what is tcsr and what does it ? It also seems to be optional, why's that ?

-- 
balbi

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  parent reply	other threads:[~2015-11-20 15:06 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-20  8:35 [PATCH 0/4] Add QCOM DWC3 Phy support Andy Gross
2015-11-20  8:35 ` [PATCH 1/4] phy: Add Qualcomm DWC3 HS/SS PHY driver Andy Gross
2015-11-20  8:35 ` [PATCH 2/4] usb: dwc3: qcom: Configure TCSR phy mux register Andy Gross
     [not found]   ` <1448008509-8913-3-git-send-email-agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-11-20 15:06     ` Felipe Balbi [this message]
2015-11-20 15:54       ` Andy Gross
2015-11-20  8:35 ` [PATCH 3/4] ARM: dts: qcom: Add DWC3 USB support on IPQ8064 Andy Gross
2015-11-20  8:35 ` [PATCH 4/4] Documentation: usb: dwc3: qcom: Add TCSR mux usage Andy Gross
     [not found]   ` <1448008509-8913-5-git-send-email-agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-11-20 14:33     ` Rob Herring
2015-11-20 15:08   ` Felipe Balbi
2015-11-20 15:56     ` Andy Gross

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