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Wed, 24 Dec 2025 02:59:47 -0800 (PST) X-Google-Smtp-Source: AGHT+IFDxjHcmbAfU0vMSZnnELdYkr52FpZ+BCX/CkrCd0ClqFv8mPu7xlW3LaO3oV2R81ZNpYlPOg== X-Received: by 2002:a05:6a20:e290:b0:35f:6e12:184c with SMTP id adf61e73a8af0-376a9ace741mr16490450637.60.1766573986843; Wed, 24 Dec 2025 02:59:46 -0800 (PST) Received: from [192.168.1.5] ([27.57.93.98]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-34eacbca905sm5971094a91.5.2025.12.24.02.59.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 24 Dec 2025 02:59:46 -0800 (PST) Message-ID: <87b300a0-7ff6-4506-a27a-7a30e77c2bf6@oss.qualcomm.com> Date: Wed, 24 Dec 2025 16:29:40 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] dt-bindings: interconnect: add clocks property to enable QoS on qcs8300 To: Dmitry Baryshkov Cc: Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Raviteja Laggyshetty , Bartosz Golaszewski , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mike Tipton References: <20251128150106.13849-1-odelu.kukatla@oss.qualcomm.com> <20251128150106.13849-2-odelu.kukatla@oss.qualcomm.com> Content-Language: en-US From: Odelu Kukatla In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: qptjTeNw5dENbKnMmROJ-Fxpsyt3qleR X-Proofpoint-ORIG-GUID: qptjTeNw5dENbKnMmROJ-Fxpsyt3qleR X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjI0MDA5NCBTYWx0ZWRfX9quKTm9s0FJp pMimyl0rp7eT1xBNdRNbQghlCZT7nmuBYJ9SLEc2NM4Y8WBn3g7/HEvVQMsu2xosjDvBLYfQSXI sLVx/l5LqU+6ywbsq/VqqQz6WUAkq4qC0h18+ye+4YyC2wdTQXOycZussUsVxNE8Lo6lQZGL2xx qKw/PdnsBmf7tgcZAPzCde3mBclBvYV8aUyICgTnlSbK993nVN2uddBXsxs9zcgNonOBljEh6Le CzZDQ9lnDnFXNMt5YxTxEnQMqVeX2AvMJFuG8sgGON67OV14V3Baof/T9ROth8p/PPTXP12c6Fz e+UzRo+R+zlAc02zriZJ0Ev+KWO0ZVtlaKlIIKlgfq9QSl5oXz1jq85FESJ7lkOkji3mIiBGf1m HMov16VSR6v/soaMV1Y56l7gcDHM0Fl4rMG9OT+bpLMoq15btrunABE49d9WsThx5F8f+BADKDF QZegcUPIx88gyXrs84Q== X-Authority-Analysis: v=2.4 cv=Qahrf8bv c=1 sm=1 tr=0 ts=694bc7a4 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=luqpl2TCSyK2LuNNAmtdDg==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=izIGmOzjKg6u1_hBuywA:9 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-24_03,2025-12-22_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 priorityscore=1501 malwarescore=0 spamscore=0 bulkscore=0 impostorscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512240094 On 12/24/2025 1:25 AM, Dmitry Baryshkov wrote: > On Fri, Nov 28, 2025 at 08:31:04PM +0530, Odelu Kukatla wrote: >> Add 'clocks' property to enable QoS configuration. This property >> enables the necessary clocks for QoS configuration. >> >> QoS configuration is essential for ensuring that latency sensitive >> components such as CPUs and multimedia engines receive prioritized >> access to memory and interconnect resources. This helps to manage >> bandwidth and latency across subsystems, improving system responsiveness >> and performance in concurrent workloads. >> >> Both 'reg' and 'clocks' properties are optional. If either is missing, >> QoS configuration will be skipped. This behavior is controlled by the >> 'qos_requires_clocks' flag in the driver, which ensures that QoS >> configuration is bypassed when required clocks are not defined. >> >> Signed-off-by: Odelu Kukatla >> --- >> .../interconnect/qcom,qcs8300-rpmh.yaml | 53 ++++++++++++++++--- >> 1 file changed, 47 insertions(+), 6 deletions(-) > > As a generic feedback for Qualcomm interconnect drivers (please pass it > through the team): > > Please ensure that QoS-related clocks are defined in the first driver > submission. DT bindings should describe the hardware and it's not that > the hardware has changed between the time the first patches were > submitted and this patchset. > > I see a typical pattern that QoS support is being submitted several > months later. Why is it so? Why can't QoS be a part of the _same_ > patchset? > Hi Dmitry, Thanks for feedback. we are ensuring that QoS-related clocks are defined in the first driver submission like recently for Glymur/Kaanapali, there were part of first driver submission. QCS8300 and QCS615 are the only chip-sets, we are sending QoS patches separately. Thanks, Odelu