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[87.19.160.215]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5c882493f55sm1215805a12.91.2024.09.27.08.01.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Sep 2024 08:01:08 -0700 (PDT) Message-ID: <8805a597-813e-49e5-82da-69ad15249601@gmail.com> Date: Fri, 27 Sep 2024 17:01:05 +0200 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 04/11] drm/msm: Add CONTEXT_SWITCH_CNTL bitfields To: Connor Abbott Cc: Rob Clark , Sean Paul , Konrad Dybcio , Abhinav Kumar , Dmitry Baryshkov , Marijn Suijten , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Jonathan Corbet , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Neil Armstrong References: <20240926-preemption-a750-t-v6-0-7b6e1ef3648f@gmail.com> <20240926-preemption-a750-t-v6-4-7b6e1ef3648f@gmail.com> Content-Language: en-US From: Antonino Maniscalco In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 9/27/24 1:57 PM, Connor Abbott wrote: > In the future, the right thing to do is open a mesa MR with just the > register changes and then copy the file from mesa once it's merged, > because all of the XML files are supposed to flow from mesa to keep > mesa and the kernel in sync. I've opened a mesa MR [1] based on this > that will hopefully get quickly acked and merged. > > Connor Sure I'll keep that in mind, thanks! > > [1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31422 > > On Thu, Sep 26, 2024 at 10:17 PM Antonino Maniscalco > wrote: >> >> Add missing bitfields to CONTEXT_SWITCH_CNTL in a6xx.xml. >> >> Tested-by: Neil Armstrong # on SM8650-QRD >> Tested-by: Neil Armstrong # on SM8550-QRD >> Tested-by: Neil Armstrong # on SM8450-HDK >> Signed-off-by: Antonino Maniscalco >> --- >> drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 7 ++++++- >> 1 file changed, 6 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/msm/registers/adreno/a6xx.xml b/drivers/gpu/drm/msm/registers/adreno/a6xx.xml >> index 2dfe6913ab4f52449b76c2f75b2d101c08115d16..fd31d1d7a11eef7f38dcc2975dc1034f6b7a2e41 100644 >> --- a/drivers/gpu/drm/msm/registers/adreno/a6xx.xml >> +++ b/drivers/gpu/drm/msm/registers/adreno/a6xx.xml >> @@ -1337,7 +1337,12 @@ to upconvert to 32b float internally? >> >> >> >> - >> + >> + > > This bit isn't set to 1 when it's stopped, it's set to > >> + >> + >> + >> + >> >> >> >> >> -- >> 2.46.1 >> Best regards, -- Antonino Maniscalco