From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Dwivedi, Avaneesh Kumar (avani)" Subject: Re: [RESEND PATCH v4 5/7] remoteproc: qcom: Modify reset sequence for hexagon to support v56 1.5.0 Date: Wed, 14 Dec 2016 21:20:12 +0530 Message-ID: <8817f22c-b0bb-f560-89ce-0c71aca45320@codeaurora.org> References: <1479981638-32069-1-git-send-email-akdwived@codeaurora.org> <1479981638-32069-6-git-send-email-akdwived@codeaurora.org> <20161209043510.GS30492@tuxbot> <0f3dbcbb-4ed5-dac8-a9c7-a22d597f4be5@codeaurora.org> <20161213180924.GG3439@tuxbot> <20161213220730.GK3439@tuxbot> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Return-path: Received: from smtp.codeaurora.org ([198.145.29.96]:41714 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932368AbcLNPuT (ORCPT ); Wed, 14 Dec 2016 10:50:19 -0500 In-Reply-To: <20161213220730.GK3439@tuxbot> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Bjorn Andersson Cc: sboyd@codeaurora.org, agross@codeaurora.org, linux-arm-msm@vger.kernel.org On 12/14/2016 3:37 AM, Bjorn Andersson wrote: > On Tue 13 Dec 11:45 PST 2016, Dwivedi, Avaneesh Kumar (avani) wrote: >> On 12/13/2016 11:39 PM, Bjorn Andersson wrote: > [..] >>> Either way, using the non-_relaxed version of writel() will be >>> equivalent to what you have now. >> Do you mean if writel is used , udelay() should be removed? > No, I mean that looping writel_relaxed() + wmb() is roughly > equivalent to writel(). So with the overall comment of you replacing > readl_relaxed() and writel_relaxed() with their plain readl/writel > counterparts takes care of the wmb(). Thanks got it, yes my requirement was to get write done before control reaches udelay(), so i will add readl() before udelay and remove mb() I hope after this change i can submit next set of patches? > >> i understand >> writel will not return before register write operation is actually done. >> udelay() is to give enough time so that after writel , there is some time >> available to turn on mem peripheral and data array. > As far as I understand, wmb() will ensure that any cache coherent or > write-back buffered writes are committed before any subsequent writes. > But that this is not the same as the write has finished. > > As far as I can see, the downstream code (msm-3.18) do: > > for (i = 19; i >= 0; i--) { > val |= BIT(i); > writel_relaxed(val, MEM_PWR_CTL); > val |= readl_relaxed(MEM_PWR_CTL); > udelay(1); > } > > I.e. for this particular version it actually does read back the value, > which will cause a wait for the write to be propagated. But I'm not sure > why this is the only version doing this. > > Regards, > Bjorn -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.