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Fri, 22 Nov 2024 10:38:38 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AMAcb39022911 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 22 Nov 2024 10:38:37 GMT Received: from [10.231.207.28] (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 22 Nov 2024 02:38:31 -0800 Message-ID: <89228c85-9b0e-477f-9cb9-e775850b2eb0@quicinc.com> Date: Fri, 22 Nov 2024 18:38:29 +0800 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: sa8775p: pmic: enable rtc From: Tingguo Cheng To: Krzysztof Kozlowski , , , , , CC: , , , , , , , References: <20240902104302.3959670-1-quic_tingguoc@quicinc.com> <14392fbf-9bf6-4e39-8ba2-59473351a64b@quicinc.com> Content-Language: en-US In-Reply-To: <14392fbf-9bf6-4e39-8ba2-59473351a64b@quicinc.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: UsCjIRpN91dkqMPcGJNU0tAOefnGXCal X-Proofpoint-GUID: UsCjIRpN91dkqMPcGJNU0tAOefnGXCal X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 mlxlogscore=949 suspectscore=0 spamscore=0 phishscore=0 bulkscore=0 adultscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411220090 On 9/19/2024 10:23 AM, Tingguo Cheng wrote: > > > On 9/6/2024 8:22 PM, Krzysztof Kozlowski wrote: >> On 02/09/2024 12:43, Tingguo Cheng wrote: >>> Add RTC node, the RTC is controlled by PMIC device via spmi bus. >>> >>> Signed-off-by: Tingguo Cheng >>> --- >>>   arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 8 ++++++++ >>>   1 file changed, 8 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/ >>> arm64/boot/dts/qcom/sa8775p-pmics.dtsi >>> index 1369c3d43f86..47d05b897d5a 100644 >>> --- a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi >> >> We achieved consensus allowing sa8775p to stay, but now Qualcomm changes >> point of view and insists on new approach of dropping sa8775p. Therefore >> this change does not make much sense in the new approach. >> > The new approach(QCS9100+sa8775p compatible) will still use the same > PMIC chip(As usually, include sa8775p-pmics.dtsi as it's pmic part). > Therefore, from this point, it does make sense in the new approach. > From another point, for old boards, this change should have been there. > >> Best regards, >> Krzysztof >> > We have aligned this internally again, "sa8775p-pmics.dtsi" still continue to be used for qcs9100-ride. Can you help review/apply this change? We need this RTC function in some boards. -- Thank you & BRs Tingguo