From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Jie Gan <quic_jiegan@quicinc.com>,
Mike Leach <mike.leach@linaro.org>,
James Clark <james.clark@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: Tingwei Zhang <quic_tingweiz@quicinc.com>,
Jinlong Mao <quic_jinlmao@quicinc.com>,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-msm@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH v15 05/10] Coresight: Allocate trace ID after building the path
Date: Tue, 4 Mar 2025 14:58:01 +0000 [thread overview]
Message-ID: <8efe6176-44a2-4b3d-b9b5-855b26f00187@arm.com> (raw)
In-Reply-To: <20250303032931.2500935-6-quic_jiegan@quicinc.com>
On 03/03/2025 03:29, Jie Gan wrote:
> The trace_id will be stored in coresight_path instead of being declared
> everywhere and allocated after building the path.
>
> Co-developed-by: James Clark <james.clark@linaro.org>
> Signed-off-by: James Clark <james.clark@linaro.org>
> Signed-off-by: Jie Gan <quic_jiegan@quicinc.com>
> ---
> drivers/hwtracing/coresight/coresight-core.c | 44 +++++++++++++++++++
> .../hwtracing/coresight/coresight-etm-perf.c | 5 +--
> drivers/hwtracing/coresight/coresight-priv.h | 2 +
> drivers/hwtracing/coresight/coresight-sysfs.c | 4 ++
> 4 files changed, 52 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
> index ed0e9368324d..6adc06995d76 100644
> --- a/drivers/hwtracing/coresight/coresight-core.c
> +++ b/drivers/hwtracing/coresight/coresight-core.c
> @@ -655,6 +655,50 @@ static void coresight_drop_device(struct coresight_device *csdev)
> }
> }
>
> +/*
> + * coresight device will read their existing or alloc a trace ID, if their trace_id
> + * callback is set.
> + *
> + * Return 0 if the trace_id callback is not set.
> + * Return the result of the trace_id callback if it is set. The return value
> + * will be the trace_id if successful, and an error number if it fails.
> + */
> +static int coresight_get_trace_id(struct coresight_device *csdev,
> + enum cs_mode mode,
> + struct coresight_device *sink)
> +{
> + if (coresight_ops(csdev)->trace_id)
> + return coresight_ops(csdev)->trace_id(csdev, mode, sink);
> +
> + return 0;
> +}
> +
> +/*
> + * Call this after creating the path and before enabling it. This leaves
> + * the trace ID set on the path, or it remains 0 if it couldn't be assigned.
> + */
> +void coresight_path_assign_trace_id(struct coresight_path *path,
> + enum cs_mode mode)
> +{
> + struct coresight_device *sink = coresight_get_sink(&path->path_list);
> + struct coresight_node *nd;
> + int trace_id;
> +
> + list_for_each_entry(nd, &path->path_list, link) {
> + /* Assign a trace ID to the path for the first device that wants to do it */
> + trace_id = coresight_get_trace_id(nd->csdev, mode, sink);
> +
> + /*
> + * 0 in this context is that it didn't want to assign so keep searching.
> + * Non 0 is either success or fail.
> + */
checkpatch complains:
WARNING: Block comments should align the * on each line
#65: FILE: drivers/hwtracing/coresight/coresight-core.c:694:
+ * Non 0 is either success or fail.
+ */
Please make sure to run the checkpatch on individual patches before
submitting in the future. I will fix this up locally for now.
Kind regards
Suzuki
> + if (trace_id != 0) {
> + path->trace_id = trace_id;
> + return;
> + }
> + }
> +}
> +
> /**
> * _coresight_build_path - recursively build a path from a @csdev to a sink.
> * @csdev: The device to start from.
> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
> index b0426792f08a..134290ab622e 100644
> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c
> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
> @@ -319,7 +319,6 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
> {
> u32 id, cfg_hash;
> int cpu = event->cpu;
> - int trace_id;
> cpumask_t *mask;
> struct coresight_device *sink = NULL;
> struct coresight_device *user_sink = NULL, *last_sink = NULL;
> @@ -409,8 +408,8 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
> }
>
> /* ensure we can allocate a trace ID for this CPU */
> - trace_id = coresight_trace_id_get_cpu_id_map(cpu, &sink->perf_sink_id_map);
> - if (!IS_VALID_CS_TRACE_ID(trace_id)) {
> + coresight_path_assign_trace_id(path, CS_MODE_PERF);
> + if (!IS_VALID_CS_TRACE_ID(path->trace_id)) {
> cpumask_clear_cpu(cpu, mask);
> coresight_release_path(path);
> continue;
> diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
> index 27b7dc348d4a..2bea35bae0d4 100644
> --- a/drivers/hwtracing/coresight/coresight-priv.h
> +++ b/drivers/hwtracing/coresight/coresight-priv.h
> @@ -152,6 +152,8 @@ int coresight_make_links(struct coresight_device *orig,
> void coresight_remove_links(struct coresight_device *orig,
> struct coresight_connection *conn);
> u32 coresight_get_sink_id(struct coresight_device *csdev);
> +void coresight_path_assign_trace_id(struct coresight_path *path,
> + enum cs_mode mode);
>
> #if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM3X)
> extern int etm_readl_cp14(u32 off, unsigned int *val);
> diff --git a/drivers/hwtracing/coresight/coresight-sysfs.c b/drivers/hwtracing/coresight/coresight-sysfs.c
> index cb4c39732d26..d03751bf3d8a 100644
> --- a/drivers/hwtracing/coresight/coresight-sysfs.c
> +++ b/drivers/hwtracing/coresight/coresight-sysfs.c
> @@ -209,6 +209,10 @@ int coresight_enable_sysfs(struct coresight_device *csdev)
> goto out;
> }
>
> + coresight_path_assign_trace_id(path, CS_MODE_SYSFS);
> + if (!IS_VALID_CS_TRACE_ID(path->trace_id))
> + goto err_path;
> +
> ret = coresight_enable_path(&path->path_list, CS_MODE_SYSFS, NULL);
> if (ret)
> goto err_path;
next prev parent reply other threads:[~2025-03-04 14:58 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-03 3:29 [PATCH v15 00/10] Coresight: Add Coresight TMC Control Unit driver Jie Gan
2025-03-03 3:29 ` [PATCH v15 01/10] Coresight: Add support for new APB clock name Jie Gan
2025-03-03 3:29 ` [PATCH v15 02/10] Coresight: Add trace_id function to retrieving the trace ID Jie Gan
2025-03-05 11:07 ` Mike Leach
2025-03-05 13:27 ` Jie Gan
2025-03-05 14:58 ` Mike Leach
2025-03-05 15:25 ` Jie Gan
2025-03-03 3:29 ` [PATCH v15 03/10] Coresight: Use coresight_etm_get_trace_id() in traceid_show() Jie Gan
2025-03-03 3:29 ` [PATCH v15 04/10] Coresight: Introduce a new struct coresight_path Jie Gan
2025-03-04 16:10 ` Suzuki K Poulose
2025-03-05 1:34 ` Jie Gan
2025-03-03 3:29 ` [PATCH v15 05/10] Coresight: Allocate trace ID after building the path Jie Gan
2025-03-04 14:58 ` Suzuki K Poulose [this message]
2025-03-05 1:37 ` Jie Gan
2025-03-03 3:29 ` [PATCH v15 06/10] Coresight: Change to read the trace ID from coresight_path Jie Gan
2025-03-03 3:29 ` [PATCH v15 07/10] Coresight: Change functions to accept the coresight_path Jie Gan
2025-03-03 3:29 ` [PATCH v15 08/10] dt-bindings: arm: Add Coresight TMC Control Unit hardware Jie Gan
2025-03-03 3:29 ` [PATCH v15 09/10] Coresight: Add Coresight TMC Control Unit driver Jie Gan
2025-03-04 14:59 ` Suzuki K Poulose
2025-03-05 1:39 ` Jie Gan
2025-03-03 3:29 ` [PATCH v15 10/10] arm64: dts: qcom: sa8775p: Add CTCU and ETR nodes Jie Gan
2025-03-04 12:28 ` Suzuki K Poulose
2025-03-10 2:57 ` Jie Gan
2025-03-10 9:46 ` Konrad Dybcio
2025-03-05 11:05 ` [PATCH v15 00/10] [subset] Coresight: Add Coresight TMC Control Unit driver Suzuki K Poulose
2025-03-14 20:01 ` (subset) [PATCH v15 00/10] " Bjorn Andersson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=8efe6176-44a2-4b3d-b9b5-855b26f00187@arm.com \
--to=suzuki.poulose@arm.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=alexandre.torgue@foss.st.com \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=coresight@lists.linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=james.clark@linaro.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=mcoquelin.stm32@gmail.com \
--cc=mike.leach@linaro.org \
--cc=quic_jiegan@quicinc.com \
--cc=quic_jinlmao@quicinc.com \
--cc=quic_tingweiz@quicinc.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox