From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E071429BDB6; Sun, 19 Oct 2025 09:13:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760865192; cv=none; b=tby6CutwP5fPpWhcLxE7knZDDF29gbodVO6D6m0vUPiHh6tE7CQIRIBiQxmBSQpiBYGYE0LPLEM7UI76EgjghmFm9fagDPLsBsuGm9U55Ma7AHoYuSOgAuWjn8fAi1XpvsVxtPGEpGOyH5cgzYjI9MdU4RN+nIDpK7TQak2WELs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760865192; c=relaxed/simple; bh=cS2664aPb+EmVIid19f3kzZfKdifj4f7Pzq4bzCqEdI=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=C9oDIsripI/ZYFsM8LHUesnGJXz9ivPtTF6M4S5r5eWjjlM+Na/OMgo02ovSnn7FDmlFjbjs7evzYpjCglUFzeOvdkOPiu5UVrO75Jd6LchbJNdzhWhqUq7CaFZNlSRgnM7KNKK0oaogEeZv2AGFoXcYDMVtxuZCG7E6/Uy+L9E= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=uS+5M1Qe; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="uS+5M1Qe" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3D906C4CEE7; Sun, 19 Oct 2025 09:13:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1760865190; bh=cS2664aPb+EmVIid19f3kzZfKdifj4f7Pzq4bzCqEdI=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=uS+5M1QeR6d0fvKMMVJIx4KJo8wpoKJWjEP6AmnxDbiGlCrSTU11/k2Xt1MzDI1CK eKc5gp/lPLJa0Y/1ZETKYLIoUvDCQmWt7yfXNIMAILV5tZ14r9RE6Ib5QH9ey+3uG4 76PPa4/5QZqnbZDNOFK/E4mQRdAAWiU3jFJdoGzCpfzpZysDE7uveTFtZ6ty3BYlYx S7IVioorvHJr6rW1iA0lsKVHo3QVgNUxWkBccNxLh8r9w1w6brpuvRZ7gG4i0CaHO+ W98jlBDe0OcYrCT5f/QN7WwKxFkQRwr84n245Wk5cGktQhSxqcWBKJYR4ghVOywqaP bUP6EGKN1hFQg== Message-ID: <8f3f4874-2e82-473e-87bd-e3bd58089b90@kernel.org> Date: Sun, 19 Oct 2025 11:13:03 +0200 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/6] dt-bindings: display/msm/gmu: Document A612 RGMU To: Akhil P Oommen , Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20251017-qcs615-spin-2-v1-0-0baa44f80905@oss.qualcomm.com> <20251017-qcs615-spin-2-v1-3-0baa44f80905@oss.qualcomm.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 17/10/2025 19:08, Akhil P Oommen wrote: > RGMU a.k.a Reduced Graphics Management Unit is a small state machine > with the sole purpose of providing IFPC (Inter Frame Power Collapse) > support. Compared to GMU, it doesn't manage GPU clock, voltage > scaling, bw voting or any other functionalities. All it does is detect > an idle GPU and toggle the GDSC switch. As it doesn't access DDR space, > it doesn't require iommu. > > So far, only Adreno 612 GPU has an RGMU core. Document RGMU in the GMU's > schema. > > Signed-off-by: Akhil P Oommen > --- > .../devicetree/bindings/display/msm/gmu.yaml | 98 +++++++++++++++++----- > 1 file changed, 79 insertions(+), 19 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml > index afc1879357440c137cadeb2d9a74ae8459570a25..a262d41755f09f21f607bf7a1fd567f386595f39 100644 > --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml > @@ -26,6 +26,9 @@ properties: > - items: > - pattern: '^qcom,adreno-gmu-x[1-9][0-9][0-9]\.[0-9]$' > - const: qcom,adreno-gmu > + - items: > + - const: qcom,adreno-rgmu-612.0 > + - const: qcom,adreno-rgmu > - const: qcom,adreno-gmu-wrapper > > reg: > @@ -45,24 +48,30 @@ properties: > maxItems: 7 > > interrupts: > - items: > - - description: GMU HFI interrupt > - - description: GMU interrupt Both stay, just explain what is the first interrupt. You should not drop descriptions here. Look at every other binding - of course except that terrible Adreno GPU which is anti-example. > + minItems: 2 > + maxItems: 2 > > interrupt-names: > - items: > - - const: hfi > - - const: gmu > + oneOf: > + - items: > + - const: hfi > + description: GMU HFI interrupt No, descriptions never go to xxx-names, but to xxx. > + - const: gmu > + description: GMU interrupt > + - items: > + - const: oob > + description: GMU OOB interrupt > + - const: gmu > + description: GMU interrupt > + > > power-domains: > - items: > - - description: CX power domain > - - description: GX power domain > + minItems: 2 > + maxItems: 3 No. > > power-domain-names: > - items: > - - const: cx > - - const: gx > + minItems: 2 > + maxItems: 3 No. Why? > > iommus: > maxItems: 1 > @@ -86,6 +95,44 @@ required: > additionalProperties: false > > allOf: > + - if: > + properties: > + compatible: > + contains: > + const: qcom,adreno-rgmu-612.0 > + then: > + properties: > + reg: > + items: > + - description: Core RGMU registers > + reg-names: > + items: > + - const: gmu > + clocks: > + items: > + - description: GMU clock > + - description: GPU CX clock > + - description: GPU AXI clock > + - description: GPU MEMNOC clock > + - description: GPU SMMU vote clock > + clock-names: > + items: > + - const: gmu > + - const: cxo > + - const: axi > + - const: memnoc > + - const: smmu_vote > + power-domains: > + items: > + - description: CX power domain > + - description: GX power domain > + - description: VDD_CX power domain > + power-domain-names: > + items: > + - const: cx > + - const: gx > + - const: vdd_cx This does not make even sense. Why did you remove the the common list from power-domain-names? > + > - if: > properties: > compatible: > @@ -313,13 +360,26 @@ allOf: > items: > - const: gmu > else: > - required: > - - clocks > - - clock-names > - - interrupts > - - interrupt-names > - - iommus > - - operating-points-v2 > + if: > + properties: > + compatible: > + contains: > + const: qcom,adreno-rgmu > + then: > + required: > + - clocks > + - clock-names > + - interrupts > + - interrupt-names > + - operating-points-v2 > + else: No. Don't nest multiple ifs. > + required: > + - clocks > + - clock-names > + - interrupts > + - interrupt-names > + - iommus > + - operating-points-v2 > > examples: > - | > Best regards, Krzysztof