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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Taniya Das <taniya.das@oss.qualcomm.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	Ajit Pandey <ajit.pandey@oss.qualcomm.com>,
	Imran Shaik <imran.shaik@oss.qualcomm.com>,
	Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
Subject: Re: [PATCH v3 2/4] clk: qcom: ecpricc-qdu100: Add mem_enable_mask to the clock memory branch
Date: Thu, 30 Oct 2025 12:11:01 +0100	[thread overview]
Message-ID: <98da2c17-764d-43db-9b13-d950078ba41c@oss.qualcomm.com> (raw)
In-Reply-To: <e308a74f-1724-48d4-9d1a-fba6d06a29aa@oss.qualcomm.com>

On 10/30/25 7:24 AM, Taniya Das wrote:
> 
> 
> On 10/24/2025 2:09 PM, Konrad Dybcio wrote:
>> On 10/24/25 6:24 AM, Taniya Das wrote:
>>> Add the newly introduced 'mem_enable_mask' to the memory control branch
>>> clocks of ECPRI clock controller to align to the new mem_ops handling.
>>>
>>> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
>>> ---
>>
>> This probably fixes some ugly issue, could you please mention what
>> the impact/problem is?
>>
> Konrad, this isn’t an issue. Previously, the ECPRI clock controller’s
> mem_ops clocks used the mem_enable_ack_mask bit directly for both
> setting and polling. However, this approach didn’t apply to newer
> mem_ops clocks.

Right, the videocc patch you attached makes use of this. I didn't notice
previously.

> Based on the feedback from v2, I’ve refactored the mem_ops code to
> handle these cases more cleanly, which required updating the ECPRI
> clocks as well.

Please split the changes into:

1. add new struct fields, explaining the reason for the change
2. update the ECPRI driver (so that when the next patch lands the func
  isn't broken)
3. use the new fields in clk-branch.c now that all users (just qdu1000) have
   the required data filled in

So that the platform remains functional at any point in time (which is a
policy because it impacts bisect)

1&2 can be potentially squashed, potayto/potahto

Konrad

  reply	other threads:[~2025-10-30 11:11 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-24  4:24 [PATCH v3 0/4] Add the support for SM8750 Video clock controller Taniya Das
2025-10-24  4:24 ` [PATCH v3 1/4] clk: qcom: branch: Extend invert logic for branch2 mem clocks Taniya Das
2025-10-24  8:39   ` Konrad Dybcio
2025-10-30  5:07     ` Taniya Das
2025-10-24  4:24 ` [PATCH v3 2/4] clk: qcom: ecpricc-qdu100: Add mem_enable_mask to the clock memory branch Taniya Das
2025-10-24  8:39   ` Konrad Dybcio
2025-10-30  6:24     ` Taniya Das
2025-10-30 11:11       ` Konrad Dybcio [this message]
2025-10-30 17:06         ` Taniya Das
2025-10-24  4:24 ` [PATCH v3 3/4] dt-bindings: clock: qcom: Add SM8750 video clock controller Taniya Das
2025-10-24  4:24 ` [PATCH v3 4/4] clk: qcom: videocc-sm8750: Add video clock controller driver for SM8750 Taniya Das
2025-10-28 10:38   ` Konrad Dybcio
2025-10-30 11:11   ` Konrad Dybcio
2025-10-30 17:07     ` Taniya Das

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