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Mon, 24 Mar 2025 07:10:02 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 52O7A16L028038 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 24 Mar 2025 07:10:01 GMT Received: from [10.233.19.224] (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 24 Mar 2025 00:09:57 -0700 Message-ID: <9ea8fe39-b818-403b-bd69-815e58eb2949@quicinc.com> Date: Mon, 24 Mar 2025 15:09:54 +0800 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/3] arm64: defconfig: enable PCI Power Control for PCIe3 To: Bartosz Golaszewski , Krzysztof Kozlowski CC: , , , , , , , , , , , , , "Bartosz Golaszewski" References: <20250320055502.274849-1-quic_wenbyao@quicinc.com> <20250320055502.274849-2-quic_wenbyao@quicinc.com> <694b6638-92b2-4ac0-a175-bd29aea6cba9@kernel.org> Content-Language: en-US From: "Wenbin Yao (Consultant)" In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: W5rVTvp_6yXf7rqNN-IOLx3unxZyMuqQ X-Proofpoint-ORIG-GUID: W5rVTvp_6yXf7rqNN-IOLx3unxZyMuqQ X-Authority-Analysis: v=2.4 cv=CPoqXQrD c=1 sm=1 tr=0 ts=67e1054b cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=VwQbUJbxAAAA:8 a=COk6AnOGAAAA:8 a=5vY_lBfp_abUPGzNiLoA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-24_03,2025-03-21_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 mlxlogscore=892 spamscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 mlxscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 phishscore=0 impostorscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503240051 On 3/21/2025 5:43 PM, Bartosz Golaszewski wrote: > On Fri, Mar 21, 2025 at 8:37 AM Krzysztof Kozlowski wrote: >> On 20/03/2025 06:55, Wenbin Yao wrote: >>> From: Qiang Yu >>> >>> Enable the pwrctrl driver, which is utilized to manage the power supplies >>> of the devices connected to the PCI slots. This ensures that the voltage >>> rails of the x8 PCI slots on the X1E80100 - QCP can be correctly turned >>> on/off if they are described under PCIe port device tree node. >>> >>> Signed-off-by: Qiang Yu >>> Signed-off-by: Wenbin Yao >>> --- >>> arch/arm64/configs/defconfig | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig >>> index 85ec2fba1..de86d1121 100644 >>> --- a/arch/arm64/configs/defconfig >>> +++ b/arch/arm64/configs/defconfig >>> @@ -245,6 +245,7 @@ CONFIG_PCIE_LAYERSCAPE_GEN4=y >>> CONFIG_PCI_ENDPOINT=y >>> CONFIG_PCI_ENDPOINT_CONFIGFS=y >>> CONFIG_PCI_EPF_TEST=m >>> +CONFIG_PCI_PWRCTL_SLOT=y >> Bartosz, >> >> Wasn't the intention to select it the same way as PCI_PWRCTL_PWRSEQ is >> selected? >> >> Best regards, >> Krzysztof >> > For sure. I would expect there to be something like: > > select PCI_PWRCTL_SLOT if ARCH_QCOM > > in Kconfig and nothing in defconfig. > > Bartosz IIUC, pci slot power driver is a common driver that could be used by all DT based platform. -- With best wishes Wenbin