From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dima Zavin Subject: Re: [PATCH v2 02/11] msm: Generalize timer register mappings Date: Wed, 26 Jan 2011 14:50:30 -0800 Message-ID: References: <1292384961-8851-1-git-send-email-stepanm@codeaurora.org> <1295468747-22796-1-git-send-email-davidb@codeaurora.org> <1295468747-22796-3-git-send-email-davidb@codeaurora.org> <1295908604.29639.62.camel@c-dwalke-linux.qualcomm.com> <8yaei81kjlc.fsf@huya.qualcomm.com> <8ya7hdr70fw.fsf@huya.qualcomm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: Received: from smtp-out.google.com ([74.125.121.67]:47210 "EHLO smtp-out.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754314Ab1AZWud convert rfc822-to-8bit (ORCPT ); Wed, 26 Jan 2011 17:50:33 -0500 Received: from hpaq11.eem.corp.google.com (hpaq11.eem.corp.google.com [172.25.149.11]) by smtp-out.google.com with ESMTP id p0QMoW9e001301 for ; Wed, 26 Jan 2011 14:50:32 -0800 Received: from qyk34 (qyk34.prod.google.com [10.241.83.162]) by hpaq11.eem.corp.google.com with ESMTP id p0QMnJR8023058 (version=TLSv1/SSLv3 cipher=RC4-MD5 bits=128 verify=NOT) for ; Wed, 26 Jan 2011 14:50:30 -0800 Received: by qyk34 with SMTP id 34so5809001qyk.3 for ; Wed, 26 Jan 2011 14:50:30 -0800 (PST) In-Reply-To: <8ya7hdr70fw.fsf@huya.qualcomm.com> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: David Brown Cc: Daniel Walker , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org On Wed, Jan 26, 2011 at 2:41 PM, David Brown wr= ote: > On Wed, Jan 26 2011, Dima Zavin wrote: > >> On Mon, Jan 24, 2011 at 2:44 PM, David Brown = wrote: > >> To be honest I don't understand why you would want to do this at >> runtime. You cannot select multiple SoCs in the kernel build anyway, >> nor would you want to. Trying to have same kernel to boot on ARM v6 >> and ARM v7 would already be freaky enough. On top of that mixing 720= 1a >> with all the baggage that it comes with 8x60 just wouldn't make sens= e. >> These architectures are so different that it I can't see that ever >> being useful. When would you ever envision building for multiple of >> these SoCs at the same time? > > People (especially distributions) want to be able to build one arm > kernel rather than multiple ones. =A0The issues about CPU detection a= nd > base addresses are being worked on now. Yeah, you are right. I guess for distributions that would make a lot of sense. Point taken. I think the hard part for msm will be in the peripheral drivers and not in core. The subtle ways in which all the bits move around in the peripherals like the display and nand controllers made it very hard without doing defines and build time. I'm not sure how much worse or better it is in TI land? --Dima > Other targets, especially omap, are already way ahead of MSM in this > area. > > David > > -- > Sent by an employee of the Qualcomm Innovation Center, Inc. > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora F= orum. > -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm= " in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html