From mboxrd@z Thu Jan 1 00:00:00 1970 From: Linus Walleij Subject: Re: [PATCH v6 11/12] mmc: mmci: Add Qcom specific rx_fifocnt logic. Date: Wed, 11 Jun 2014 14:52:02 +0200 Message-ID: References: <1401699818-11329-1-git-send-email-srinivas.kandagatla@linaro.org> <1401700204-11876-1-git-send-email-srinivas.kandagatla@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: In-Reply-To: <1401700204-11876-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-mmc-owner@vger.kernel.org To: Srinivas Kandagatla Cc: Russell King , Ulf Hansson , "linux-mmc@vger.kernel.org" , Chris Ball , "linux-kernel@vger.kernel.org" , "linux-arm-msm@vger.kernel.org" List-Id: linux-arm-msm@vger.kernel.org On Mon, Jun 2, 2014 at 11:10 AM, wrote: > From: Srinivas Kandagatla > > MCIFIFOCNT register behaviour on Qcom chips is very different than the other > pl180 integrations. MCIFIFOCNT register contains the number of > words that are still waiting to be transferred through the FIFO. It keeps > decrementing once the host CPU reads the MCIFIFO. With the existing logic and > the MCIFIFOCNT behaviour, mmci_pio_read will loop forever, as the FIFOCNT > register will always return transfer size before reading the FIFO. > > Also the data sheet states that "This register is only useful for debug > purposes and should not be used for normal operation since it does not reflect > data which may or may not be in the pipeline". > > This patch implements a qcom specific get_rx_fifocnt function which is > implemented based on status register flags. Based on qcom_fifo flag in > variant data structure, the corresponding get_rx_fifocnt function is selected. > > Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij Yours, Linus Walleij