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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id z4-20020aa7c644000000b0046b471596e6sm732404edr.57.2022.12.09.07.11.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 09 Dec 2022 07:11:59 -0800 (PST) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Fri, 09 Dec 2022 16:11:59 +0100 Message-Id: Cc: , , , Subject: Re: [PATCH] dt-bindings: ufs: qcom: Add reg-names property for ICE From: "Luca Weiss" To: "Krzysztof Kozlowski" , <~postmarketos/upstreaming@lists.sr.ht>, , "Andy Gross" , "Bjorn Andersson" , "Konrad Dybcio" , "Alim Akhtar" , "Avri Altman" , "Bart Van Assche" , "Rob Herring" , "Krzysztof Kozlowski" X-Mailer: aerc 0.13.0 References: <20221209-dt-binding-ufs-v1-0-8d502f0e18d5@fairphone.com> <24fa41d2-87d1-be19-af44-337784b0f0a4@linaro.org> In-Reply-To: <24fa41d2-87d1-be19-af44-337784b0f0a4@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Fri Dec 9, 2022 at 4:05 PM CET, Krzysztof Kozlowski wrote: > On 09/12/2022 15:29, Luca Weiss wrote: > > The code in ufs-qcom-ice.c needs the ICE reg to be named "ice". Add thi= s > > in the bindings so the existing dts can validate successfully. > >=20 > > Also sm8450 is using ICE since commit 276ee34a40c1 ("arm64: dts: qcom: > > sm8450: add Inline Crypto Engine registers and clock") so move the > > compatible to the correct if. > >=20 > > Signed-off-by: Luca Weiss > > --- > > (no cover subject) > >=20 > > The only remaining validation issues I see is the following on sc8280xp= -crd.dtb > > and sa8540p-ride.dtb: > >=20 > > Unevaluated properties are not allowed ('required-opps', 'dma-coheren= t' were unexpected) > >=20 > > Maybe someone who knows something about this can handle this? > >=20 > > And the patch adding qcom,sm6115-ufshc hasn't been applied yet. > > --- > > Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 8 +++++++- > > 1 file changed, 7 insertions(+), 1 deletion(-) > >=20 > > diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Docu= mentation/devicetree/bindings/ufs/qcom,ufs.yaml > > index f2d6298d926c..58a2fb2c83c3 100644 > > --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml > > +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml > > @@ -102,7 +102,6 @@ allOf: > > - qcom,sc8280xp-ufshc > > - qcom,sm8250-ufshc > > - qcom,sm8350-ufshc > > - - qcom,sm8450-ufshc > > then: > > properties: > > clocks: > > @@ -130,6 +129,7 @@ allOf: > > - qcom,sdm845-ufshc > > - qcom,sm6350-ufshc > > - qcom,sm8150-ufshc > > + - qcom,sm8450-ufshc > > then: > > properties: > > clocks: > > @@ -149,6 +149,12 @@ allOf: > > reg: > > minItems: 2 > > maxItems: 2 > > + reg-names: > > There are no reg-names in top-level, so it's surprising to see its > customized here. It seems no one ever documented that usage... >From what I can tell, from driver side all devices not using ICE don't need reg-names, only the "ice" reg is referenced by name in the driver. I didn't add it top-level because with only one reg I think we're not supposed to use reg-names, right? Regards Luca > > > + items: > > + - const: std > > + - const: ice > > + required: > > + - reg-names > > =20 > > - if: > > properties: > >=20 > > --- > > base-commit: f925116b24c0c42dc6d5ab5111c55fd7f74e8dc7 > > change-id: 20221209-dt-binding-ufs-2d7f64797ff2 > >=20 > > Best regards, > > Best regards, > Krzysztof