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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id l25-20020a1709061c5900b00a28956cf75esm927657ejg.130.2024.01.09.03.24.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 09 Jan 2024 03:24:56 -0800 (PST) Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 09 Jan 2024 12:24:56 +0100 Message-Id: Cc: <~postmarketos/upstreaming@lists.sr.ht>, , , , Subject: Re: [PATCH 2/2] arm64: dts: qcom: sm7225-fairphone-fp4: Add PM6150L thermals From: "Luca Weiss" To: "Konrad Dybcio" , "Bjorn Andersson" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" X-Mailer: aerc 0.15.2 References: <20240105-fp4-thermals-v1-0-f95875a536b7@fairphone.com> <20240105-fp4-thermals-v1-2-f95875a536b7@fairphone.com> <18dc5f88-6590-4e2d-948f-fd77f4713f8b@linaro.org> In-Reply-To: <18dc5f88-6590-4e2d-948f-fd77f4713f8b@linaro.org> On Tue Jan 9, 2024 at 11:09 AM CET, Konrad Dybcio wrote: > > > On 1/5/24 15:54, Luca Weiss wrote: > > Configure the thermals for the PA_THERM1, MSM_THERM, PA_THERM0, > > RFC_CAM_THERM, CAM_FLASH_THERM and QUIET_THERM thermistors connected to > > PM6150L. > >=20 > > Due to hardware constraints we can only register 4 zones with > > pm6150l_adc_tm, the other 2 we can register via generic-adc-thermal. > > Ugh.. so the ADC can support more inputs than the ADC_TM that was > designed to ship alongside it can? > > And that's why the "generic-adc-thermal"-provided zones need to > be polled? This part of the code from qcom-spmi-adc-tm5.c was trigerring if I define more than 4 channels, and looking at downstream I can also see that only 4 zones are registered properly with adc_tm, the rest is registered with "qcom,adc-tm5-iio" which skips from what I could tell basically all the HW bits and only registering the thermal zone. ret =3D adc_tm5_read(chip, ADC_TM5_NUM_BTM, &channels_available, sizeof(channels_available)); if (ret) { dev_err(chip->dev, "read failed for BTM channels\n"); return ret; } for (i =3D 0; i < chip->nchannels; i++) { if (chip->channels[i].channel >=3D channels_available) { dev_err(chip->dev, "Invalid channel %d\n", chip->channels[i].channel); return -EINVAL; } } > > >=20 > > The trip points can really only be considered as placeholders, more > > configuration with cooling etc. can be added later. > >=20 > > Signed-off-by: Luca Weiss > > --- > [...] > > I've read the sentence above, but.. > > + sdm-skin-thermal { > > + polling-delay-passive =3D <1000>; > > + polling-delay =3D <5000>; > > + thermal-sensors =3D <&msm_therm_sensor>; > > + > > + trips { > > + active-config0 { > > + temperature =3D <125000>; > > + hysteresis =3D <1000>; > > + type =3D "passive"; > > I don't fancy burnt fingers for dinner! With passive trip point it wouldn't even do anything now, but at what temp do you think it should do what? I'd definitely need more time to understand more of how the thermal setup works in downstream Android, and then replicate a sane configuration for mainline with proper temperatures, cooling, etc. Regards Luca > > Konrad