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Tue, 30 Sep 2025 10:48:50 -0700 (PDT) Received: from localhost ([2a02:c7c:7259:a00:248:54ff:fe20:c34]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-40fb72fb017sm23545897f8f.3.2025.09.30.10.48.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 30 Sep 2025 10:48:49 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 30 Sep 2025 18:48:48 +0100 Message-Id: Cc: , , , , , , , "Tengfei Fan" , "Qiang Yu" , "Manish Pandey" , "Ronak Raheja" , "Jishnu Prakash" , "Kamal Wadhwa" , "Jyothi Kumar Seerapu" , "Prasad Kumpatla" , "Hangxiang Ma" , "Vikash Garodia" Subject: Re: [PATCH 00/20] arm64: dts: qcom: Introduce Kaanapali platform device tree From: "Alexey Klimov" To: "Jingyi Wang" , "Bjorn Andersson" , "Konrad Dybcio" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" X-Mailer: aerc 0.20.0 References: <20250924-knp-dts-v1-0-3fdbc4b9e1b1@oss.qualcomm.com> In-Reply-To: <20250924-knp-dts-v1-0-3fdbc4b9e1b1@oss.qualcomm.com> On Thu Sep 25, 2025 at 1:17 AM BST, Jingyi Wang wrote: > Introduce the Device Tree for the recently announced Snapdragon SoC from = Qualcomm: > https://www.qualcomm.com/products/mobile/snapdragon/smartphones/snapdrago= n-8-series-mobile-platforms/snapdragon-8-elite-gen-5 > > Bindings and base Device Tree for the Kaanapali SoC, MTP (Mobile Test Pla= tform) > and QRD (Qualcommm Reference Device) are splited in three: > > - 1-3: MTP board boot-to-shell with basic function. > - 4-16: More feature including PCIE, sdcard, usb, DSPs, PMIC related, tse= nse, bus, crypto etc. Add QRD board support. > - 17-20: Multimedia features including audio, video and camss. > > Features added and enabled: > - CPUs with PSCI idle states and cpufreq > - Interrupt-controller with PDC wakeup support > - Timers, TCSR Clock Controllers > - Reserved Shared memory > - GCC and RPMHCC > - TLMM > - Interconnect with CPU BWMONs > - QuP with uart > - SMMU > - RPMHPD and regulator > - UFS with inline crypto engine (ICE) > - LLCC > - Watchdog > - cDSP, aDSP with SMP2P and fastrpc > - BUS with I2C and SPI > - USB2/USB3 > - Modem(see crash after bring up) > - SoCCP > - SDHCI > - random number generator (RNG) and Qcrypto > - tsens > - PCIE > - coresight > - Bluetooth > - WLAN > - Audio Were everything described as audio enabled and tested? As far as I was awar= e some devices required some soundwire rework to support soundwire microphone= s. Is it finished? I don't see this linked here, but you state that audio features "added and enabled". Do we understand this correctly that, I presume, everthing that is more-or-= less compatible = = = = =20 with previous platforms were added and enabled (with renames) but not _all_= ? Probably some rewording is required. Best regards, Alexey