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[144.178.202.139]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-667b0eb986esm1186045a12.17.2026.03.18.01.45.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 18 Mar 2026 01:45:24 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Wed, 18 Mar 2026 09:45:23 +0100 Message-Id: To: "Dmitry Baryshkov" , "Luca Weiss" Cc: "Mahadevan P" , "Rob Clark" , "Dmitry Baryshkov" , "Abhinav Kumar" , "Jessica Zhang" , "Sean Paul" , "Marijn Suijten" , "David Airlie" , "Simona Vetter" , "Krishna Manikandan" , , , , , Subject: Re: [PATCH v2] drm/msm/disp/dpu: add merge3d support for sc7280 From: "Luca Weiss" X-Mailer: aerc 0.21.0-0-g5549850facc2 References: <20260101-4k-v2-1-712ae3c1f816@oss.qualcomm.com> <7tcmh65lhy7t452mwkiv37pxqwh6dbuh6voelaag6kph7tfr65@cskiwvoafbdy> In-Reply-To: <7tcmh65lhy7t452mwkiv37pxqwh6dbuh6voelaag6kph7tfr65@cskiwvoafbdy> On Tue Mar 17, 2026 at 6:45 PM CET, Dmitry Baryshkov wrote: > On Mon, Mar 16, 2026 at 10:08:47AM +0100, Luca Weiss wrote: >> Hi Dmitry, >>=20 >> On Fri Mar 13, 2026 at 6:14 PM CET, Dmitry Baryshkov wrote: >> > On Fri, Mar 13, 2026 at 09:33:18AM +0100, Luca Weiss wrote: >> >> Hi Mahadevan, >> >>=20 >> >> On Thu Jan 1, 2026 at 6:04 AM CET, Mahadevan P wrote: >> >> > On SC7280 targets, display modes with a width greater than the >> >> > max_mixer_width (2400) are rejected during mode validation when >> >> > merge3d is disabled. This limitation exists because, without a >> >> > 3D merge block, two layer mixers cannot be combined(non-DSC interfa= ce), >> >> > preventing large layers from being split across mixers. As a result= , >> >> > higher resolution modes cannot be supported. >> >> > >> >> > Enable merge3d support on SC7280 to allow combining streams from >> >> > two layer mixers into a single non-DSC interface. This capability >> >> > removes the width restriction and enables buffer sizes beyond the >> >> > 2400-pixel limit. >> >> > >> >> > Fixes: 591e34a091d1 ("drm/msm/disp/dpu1: add support for display fo= r SC7280 target") >> >> > Signed-off-by: Mahadevan P >> >>=20 >> >> This patch is causing display regression on QCM6490 fairphone-fp5. >> >>=20 >> >> With this patch in 7.0-rc3 (or 6.18.16) there's just pink noise on th= e >> >> screen. When reverting this patch everything becomes working again. >> >>=20 >> >> See also https://salsa.debian.org/Mobian-team/devices/kernels/qcom-li= nux/-/issues/41 >> >>=20 >> >> @Dmitry: Can we revert this for later 7.0-rc, in case it's not fixed >> >> quickly? >> > >> > Could you please provide the resource allocation parts of >> > debugfs/dri/0/state for both working and non-working cases? >>=20 >> Working (patch reverted) >>=20 >> resource mapping: >> pingpong=3D# # 68 # - - - - - - - - -=20 >> mixer=3D# - 68 # - - - -=20 >> ctl=3D68 # # # - - - -=20 >> dspp=3D# - - - - - - -=20 >> dsc=3D68 - - - - - - -=20 >> cdm=3D#=20 >> sspp=3D# - - - - - - - # # # - - - - -=20 >> cwb=3D- - - -=20 >>=20 >>=20 >> Broken (with the patch) >>=20 >> resource mapping: >> pingpong=3D# # 68 68 - - - - - - - - -=20 >> mixer=3D# - 68 68 - - - -=20 >> ctl=3D68 # # # - - - -=20 >> dspp=3D# - - - - - - -=20 >> dsc=3D68 - - - - - - -=20 >> cdm=3D#=20 >> sspp=3D# - - - - - - - # # # - - - - -=20 >> cwb=3D- - - -=20 > > As we have identified that the issue is what downstream calls > DUALPIPE_3DMERGE_DSC topology, could you please also check several > things (with the broken kernel): > > - What is being returned by dpu_encoder_helper_get_3d_blend_mode() (in > the broken config)? > > - If there is any difference in working and broken configs between > values being passed to (and programmed to the DSC) in > dpu_encoder_prep_dsc() ? > > - The same question for pclk calculation in dsi_host.c Is this helpful? Broken: [ 1.247165] dsi_calc_pclk:649 DBG pclk=3D111546490, bclk=3D83659867 [ 1.490559] dpu_encoder_helper_get_3d_blend_mode:309 DBG BLEND_3D_H_ROW_= INT [ 1.491008] dpu_encoder_prep_dsc:2061 DBG dsc_common_mode=3D0 initial_li= nes=3D1 Working: [ 0.998043] dsi_calc_pclk:649 DBG pclk=3D111546490, bclk=3D83659867 [ 1.233836] dpu_encoder_helper_get_3d_blend_mode:313 DBG BLEND_3D_NONE [ 1.234277] dpu_encoder_prep_dsc:2061 DBG dsc_common_mode=3D0 initial_li= nes=3D1 Or do you need some more things? There's a lot of data being passed into dpu_encoder_dsc_pipe_cfg() for example so I'm not sure which values are relevant for this. Regards Luca