[PATCH RFC net-next v4 11/14] net: stmmac: pass stmmac_pcs into dwmac_pcs_isr()

Russell King (Oracle)
2024-08-05T10:25:40Z

As the stmmac_pcs has the base address of the PCS registers, pass
this into dwmac_pcs_isr() to avoid recalculating the base address.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c | 2 +-
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 3 ++-
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h | 7 +++----
3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index d2defa2e4996..2bed04403baa 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -296,7 +296,7 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,
x->irq_rx_path_exit_lpi_mode_n++;
}

- dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);
+ dwmac_pcs_isr(&hw->mac_pcs, intr_status, x);

if (intr_status & PCS_RGSMIIIS_IRQ) {
/* TODO Dummy-read to clear the IRQ status */
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 2f02bb47c952..12b7b93ce71e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -873,7 +873,8 @@ static int dwmac4_irq_status(struct mac_device_info *hw,
x->irq_rx_path_exit_lpi_mode_n++;
}

- dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);
+ dwmac_pcs_isr(&hw->mac_pcs, intr_status, x);
+
if (intr_status & PCS_RGSMIIIS_IRQ) {
/* TODO Dummy-read to clear the IRQ status */
readl(ioaddr + GMAC_PHYIF_CONTROL_STATUS);
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
index 083128e0013c..48b635139fa5 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
@@ -61,18 +61,17 @@

/**
* dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR
- * @ioaddr: IO registers pointer
- * @reg: Base address of the AN Control Register.
+ * @spcs: pointer to &struct stmmac_pcs
* @intr_status: GMAC core interrupt status
* @x: pointer to log these events as stats
* Description: it is the ISR for PCS events: Auto-Negotiation Completed and
* Link status.
*/
-static inline void dwmac_pcs_isr(void __iomem *ioaddr, u32 reg,
+static inline void dwmac_pcs_isr(struct stmmac_pcs *spcs,
unsigned int intr_status,
struct stmmac_extra_stats *x)
{
- u32 val = readl(ioaddr + GMAC_AN_STATUS(reg));
+ u32 val = readl(spcs->pcs_base + GMAC_AN_STATUS(0));

if (intr_status & PCS_ANE_IRQ) {
x->irq_pcs_ane_n++;
--
2.30.2