From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0DC31CEAD6; Thu, 16 Oct 2025 15:01:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760626895; cv=none; b=llt4mSk7kZHu6jrlKaSejsftAffMv8b5YYw0tMBdhb2BKxO3BEFC3eyMIqjF0QwuvxVglBVVnCqt0m3N6RtVqllxB/68d2yx8rnCCvBkxSKBfwoVMIxUkBzaX2LHiWHONVedqvy3RArqe9bLQg6CtHBMbsk9LFJXkQCLmJR3+n0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760626895; c=relaxed/simple; bh=acIiVBZYAMOQ0q1mTLQ5Z+M0bKNk55oQQw05t4Z02AM=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=c3jWfcShV7pVnA6AJ0n/Cz7jy2Biz0/wnDDuVY8MfVMhbqnjc/qFcCP3tsmD314gt1qpxEtDtCHY9JVL2/LTcSUqNbZg9IRz/4BNW3LRJIm1hL1+dyRGmo/31atJDvIQwK95FE4qQsbGI7vMeOzXgdvJC/OAYAr2IcYjYmLzVAM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=Pb+rBSVW; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="Pb+rBSVW" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=HsMK/bmbWguoakn1MaiGae60AekG39Umlv+LVUeDN1A=; b=Pb+rBSVWgKCXzOyAGG3LCjTLwg ivESwePLU8+0O+2lzGyVur3sNNhCDM9dIBWlG8QLrojK57R7g2dtBktUAPvjotW2tRkzI+XTbIlAS E/YKnbqnVj06WJCWBo5p3jZMF4U11wjssJb52Rx+qRmTaNoLExK1IgwPzSOiTE6ZsYWDfvtExG7FW PYwae1cIgG249/cZecDhL3yjCApSQK8w42rfXa6pePHzbz98WsBsyQGKXIicajHvdkSmuF8l5F36J ZZxgEiNS0mnwUf/DSQmZX9rvii7sVdabVdWVfn2x+1wvuwOVh9NDPsP/9wZaSueV4ceZDmd9XCJgE PWBbJ+Cw==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:43252 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1v9P75-000000006SI-0xXN; Thu, 16 Oct 2025 15:37:55 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.98.2) (envelope-from ) id 1v9P6s-0000000AomE-2pAa; Thu, 16 Oct 2025 15:37:42 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Abhishek Chauhan , Alexandre Torgue , Alexis Lothore , Andrew Lunn , Boon Khai Ng , Daniel Machon , "David S. Miller" , Drew Fustini , Emil Renner Berthing , Eric Dumazet , Faizal Rahim , Furong Xu <0x1207@gmail.com>, Inochi Amaoto , Jacob Keller , Jakub Kicinski , "Jan Petrous (OSS)" , Jisheng Zhang , Kees Cook , Kunihiko Hayashi , Lad Prabhakar , Ley Foon Tan , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Matthew Gerlach , Maxime Chevallier , Maxime Coquelin , Michal Swiatkowski , netdev@vger.kernel.org, Oleksij Rempel , Paolo Abeni , Rohan G Thomas , Shenwei Wang , Simon Horman , Song Yoong Siang , Swathi K S , Tiezhu Yang , Vinod Koul , Vladimir Oltean , Vladimir Oltean , Yu-Chun Lin Subject: [PATCH net-next v2 12/14] net: stmmac: only call stmmac_pcs_ctrl_ane() for integrated SGMII PCS Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="utf-8" Message-Id: Sender: Russell King Date: Thu, 16 Oct 2025 15:37:42 +0100 The internal PCS registers only exist if the core is synthesized with SGMII, TBI or RTBI support. They have no relevance for RGMII. However, priv->hw->pcs contains a STMMAC_PCS_RGMII flag, which is set if a PCS has been synthesized but we are operating in RGMII mode. As the register has no effect for RGMII, there is no point calling stmmac_pcs_ctrl_ane() in this case. Add a comment describing this and make it conditional on STMMAC_PCS_SGMII. Reviewed-by: Andrew Lunn Signed-off-by: Russell King (Oracle) --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 79d09b40dbcc..c3633baf5180 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -3487,7 +3487,11 @@ static int stmmac_hw_setup(struct net_device *dev) } } - if (priv->hw->pcs) + /* The PCS control register is only relevant for SGMII, TBI and RTBI + * modes. We no longer support TBI or RTBI, so only configure this + * register when operating in SGMII mode with the integrated PCS. + */ + if (priv->hw->pcs & STMMAC_PCS_SGMII) stmmac_pcs_ctrl_ane(priv, 1, priv->hw->reverse_sgmii_enable); /* set TX and RX rings length */ -- 2.47.3