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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id n21sm1186149oie.15.2020.12.04.21.14.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Dec 2020 21:14:43 -0800 (PST) Date: Fri, 4 Dec 2020 23:14:41 -0600 From: Bjorn Andersson To: kholk11@gmail.com Cc: agross@kernel.org, sboyd@kernel.org, marijns95@gmail.com, konradybcio@gmail.com, martin.botka1@gmail.com, linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 5/5] dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings Message-ID: References: <20200926130306.13843-1-kholk11@gmail.com> <20200926130306.13843-6-kholk11@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200926130306.13843-6-kholk11@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Sat 26 Sep 08:03 CDT 2020, kholk11@gmail.com wrote: > From: AngeloGioacchino Del Regno > > Add device tree bindings for graphics clock controller for > Qualcomm Technology Inc's SDM630 and SDM660 SoCs. > --- > .../bindings/clock/qcom,sdm660-gpucc.yaml | 75 +++++++++++++++++++ > 1 file changed, 75 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sdm660-gpucc.yaml > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm660-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm660-gpucc.yaml > new file mode 100644 > index 000000000000..dbb14b274d5b > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,sdm660-gpucc.yaml > @@ -0,0 +1,75 @@ > +# SPDX-License-Identifier: GPL-2.0-only > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,sdm660-gpucc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Graphics Clock & Reset Controller Binding for SDM630 and SDM660 > + > +maintainers: > + - Taniya Das > + > +description: | > + Qualcomm graphics clock control module which supports the clocks, resets and > + power domains on SDM630 and SDM660. > + > + See also dt-bindings/clock/qcom,gpucc-sdm660.h. > + > +properties: > + compatible: > + enum: > + - qcom,sdm630-gpucc > + - qcom,sdm660-gpucc > + > + clocks: > + items: > + - description: Board XO source > + - description: GPLL0 main gpu branch > + - description: GPLL0 divider gpu branch > + > + clock-names: > + items: > + - const: xo > + - const: gcc_gpu_gpll0_clk > + - const: gcc_gpu_gpll0_div_clk > + > + '#clock-cells': > + const: 1 > + > + '#reset-cells': > + const: 1 > + > + '#power-domain-cells': > + const: 1 > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - '#clock-cells' > + - '#reset-cells' > + - '#power-domain-cells' > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + > + clock-controller@5065000 { > + compatible = "qcom,sdm660-gpucc"; > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + reg = <0x05065000 0x9038>; > + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, > + <&gcc GCC_GPU_GPLL0_CLK>, > + <&gcc GCC_GPU_GPLL0_DIV_CLK>; > + clock-names = "xo", "gpll0"; You need 3 clock-names, and they need to match what the binding defines. Other than that I think it looks good. Regards, Bjorn > + }; > +... > -- > 2.28.0 >