Linux ARM-MSM sub-architecture
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From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Andy Gross <agross@kernel.org>,
	Doug Anderson <dianders@chromium.org>,
	linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH v2 2/4] arm64: dts: qcom: sm8250: further split of spi pinctrl config
Date: Tue, 9 Feb 2021 11:56:26 -0600	[thread overview]
Message-ID: <YCLMyt5wJyG3A2OK@builder.lan> (raw)
In-Reply-To: <20210209124758.990681-3-dmitry.baryshkov@linaro.org>

On Tue 09 Feb 06:47 CST 2021, Dmitry Baryshkov wrote:
[..]
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 51d103671759..e43e1367ceb7 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -549,7 +549,6 @@ spi14: spi@880000 {
>  				clock-names = "se";
>  				clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>;
>  				pinctrl-names = "default";
> -				pinctrl-0 = <&qup_spi14_default>;

I think you should either drop the pinctrl-names as well, or you should
make this <&qup_spi14_default>, <&qup_spi14_cs>;

>  				interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
>  				#address-cells = <1>;
>  				#size-cells = <0>;
[..]
> -			qup_spi0_default: qup-spi0-default {
> +			qup_spi0_cs: qup-spi0-cs {
> +				pins = "gpio31";
> +				function = "qup0";
> +			};
> +
> +			qup_spi1_cs: qup-spi1-cs {
> +				pins = "gpio7";
> +				function = "qup1";
> +			};
> +
> +			qup_spi2_cs: qup-spi2-cs {
> +				pins = "gpio118";
> +				function = "qup2";
> +			};
> +
> +			qup_spi3_cs: qup-spi3-cs {
> +				pins = "gpio122";
> +				function = "qup3";
> +			};
> +
> +			qup_spi4_cs: qup-spi4-cs {
> +				pins = "gpio11";
> +				function = "qup4";
> +			};
> +
> +			qup_spi5_cs: qup-spi5-cs {
> +				pins = "gpio15";
> +				function = "qup5";
> +			};
> +
> +			qup_spi6_cs: qup-spi6-cs {
> +				pins = "gpio19";
> +				function = "qup6";
> +			};
> +
> +			qup_spi7_cs: qup-spi7-cs {
> +				pins = "gpio23";
> +				function = "qup7";
> +			};
> +
> +			qup_spi8_cs: qup-spi8-cs {
> +				pins = "gpio27";
> +				function = "qup8";
> +			};
> +
> +			qup_spi9_cs: qup-spi9-cs {
> +				pins = "gpio128";
> +				function = "qup9";
> +			};
> +
> +			qup_spi10_cs: qup-spi10-cs {
> +				pins = "gpio132";
> +				function = "qup10";
> +			};
> +
> +			qup_spi11_cs: qup-spi11-cs {
> +				pins = "gpio63";
> +				function = "qup11";
> +			};
> +
> +			qup_spi12_cs: qup-spi12-cs {
> +				pins = "gpio35";
> +				function = "qup12";
> +			};
> +
> +			qup_spi13_cs: qup-spi13-cs {
> +				pins = "gpio39";
> +				function = "qup13";
> +			};
> +
> +			qup_spi14_cs: qup-spi14-cs {
> +				pins = "gpio43";
> +				function = "qup14";
> +			};
> +
> +			qup_spi15_cs: qup-spi15-cs {
> +				pins = "gpio47";
> +				function = "qup15";
> +			};
> +
> +			qup_spi16_cs: qup-spi16-cs {
> +				pins = "gpio51";
> +				function = "qup16";
> +			};
> +
> +			qup_spi17_cs: qup-spi17-cs {
> +				pins = "gpio55";
> +				function = "qup17";
> +			};
> +
> +			qup_spi18_cs: qup-spi18-cs {
> +				pins = "gpio59";
> +				function = "qup18";
> +			};
> +
> +			qup_spi19_cs: qup-spi19-cs {
> +				pins = "gpio3";
> +				function = "qup19";
> +			};

If you intermix these with qup-spiX-data-clk you'll maintain the
alphabetical sort order.

> +
> +			qup_spi0_data_clk: qup-spi0-data-clk {
>  				pins = "gpio28", "gpio29",
> -				       "gpio30", "gpio31";
> +				       "gpio30";
>  				function = "qup0";
>  			};

Apart from that I think the series looks good.

Regards,
Bjorn

  reply	other threads:[~2021-02-09 18:09 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-09 12:47 [PATCH v2 0/4] arm64: dts: qcom: qrb5165-rb5: use GPIO as SPI0 CS Dmitry Baryshkov
2021-02-09 12:47 ` [PATCH v2 1/4] arm64: dts: qcom: sm8250: split spi pinctrl config Dmitry Baryshkov
2021-02-09 12:47 ` [PATCH v2 2/4] arm64: dts: qcom: sm8250: further split of " Dmitry Baryshkov
2021-02-09 17:56   ` Bjorn Andersson [this message]
2021-02-09 12:47 ` [PATCH v2 3/4] arm64: dts: qcom: sm8250: add pinctrl for SPI using GPIO as a CS Dmitry Baryshkov
2021-02-09 12:47 ` [PATCH v2 4/4] arm64: dts: qcom: qrb5165-rb5: switch into using GPIO for SPI0 CS Dmitry Baryshkov

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