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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id c7sm4133937oot.42.2021.03.29.20.32.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Mar 2021 20:32:15 -0700 (PDT) Date: Mon, 29 Mar 2021 22:32:13 -0500 From: Bjorn Andersson To: Dmitry Baryshkov Cc: Andy Gross , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Manu Gautam , Stephen Boyd , Jonathan Marek , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v5 6/7] arm64: dts: qcom: sm8250: switch usb1 qmp phy to USB3+DP mode Message-ID: References: <20210328205257.3348866-1-dmitry.baryshkov@linaro.org> <20210328205257.3348866-7-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210328205257.3348866-7-dmitry.baryshkov@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Sun 28 Mar 15:52 CDT 2021, Dmitry Baryshkov wrote: > USB1 QMP PHY is not just a USB3 PHY, but USB3+DP PHY. Change device tree > nodes accordingly. > > Signed-off-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson @Vinod, will you let me know when you've picked the driver changes so I can pick the two DT patches? Regards, Bjorn > --- > arch/arm64/boot/dts/qcom/sm8250.dtsi | 23 ++++++++++++++++++----- > 1 file changed, 18 insertions(+), 5 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi > index 947e1accae3a..0f79e6885004 100644 > --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi > @@ -2097,12 +2097,11 @@ usb_2_hsphy: phy@88e4000 { > }; > > usb_1_qmpphy: phy@88e9000 { > - compatible = "qcom,sm8250-qmp-usb3-phy"; > + compatible = "qcom,sm8250-qmp-usb3-dp-phy"; > reg = <0 0x088e9000 0 0x200>, > - <0 0x088e8000 0 0x20>; > - reg-names = "reg-base", "dp_com"; > + <0 0x088e8000 0 0x40>, > + <0 0x088ea000 0 0x200>; > status = "disabled"; > - #clock-cells = <1>; > #address-cells = <2>; > #size-cells = <2>; > ranges; > @@ -2116,7 +2115,7 @@ usb_1_qmpphy: phy@88e9000 { > <&gcc GCC_USB3_PHY_PRIM_BCR>; > reset-names = "phy", "common"; > > - usb_1_ssphy: lanes@88e9200 { > + usb_1_ssphy: usb3-phy@88e9200 { > reg = <0 0x088e9200 0 0x200>, > <0 0x088e9400 0 0x200>, > <0 0x088e9c00 0 0x400>, > @@ -2128,6 +2127,20 @@ usb_1_ssphy: lanes@88e9200 { > clock-names = "pipe0"; > clock-output-names = "usb3_phy_pipe_clk_src"; > }; > + > + dp_phy: dp-phy@88ea200 { > + reg = <0 0x088ea200 0 0x200>, > + <0 0x088ea400 0 0x200>, > + <0 0x088eac00 0 0x400>, > + <0 0x088ea600 0 0x200>, > + <0 0x088ea800 0 0x200>, > + <0 0x088eaa00 0 0x100>; > + #phy-cells = <0>; > + #clock-cells = <1>; > + clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; > + clock-names = "pipe0"; > + clock-output-names = "usb3_phy_pipe_clk_src"; > + }; > }; > > usb_2_qmpphy: phy@88eb000 { > -- > 2.30.2 >