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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id k84sm3033230oia.8.2021.06.14.09.12.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Jun 2021 09:12:06 -0700 (PDT) Date: Mon, 14 Jun 2021 11:12:04 -0500 From: Bjorn Andersson To: Bhupesh Sharma Cc: linux-arm-msm@vger.kernel.org, Linus Walleij , Liam Girdwood , Mark Brown , Vinod Koul , Rob Herring , Andy Gross , devicetree , Linux Kernel Mailing List , "open list:GPIO SUBSYSTEM" , bhupesh.linux@gmail.com Subject: Re: [PATCH 5/8] pinctrl: qcom/pinctrl-spmi-gpio: Add compatibles for pmic-gpios on SA8155p-adp Message-ID: References: <20210607113840.15435-1-bhupesh.sharma@linaro.org> <20210607113840.15435-6-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Mon 14 Jun 03:30 CDT 2021, Bhupesh Sharma wrote: > Hi Bjorn, > > On Fri, 11 Jun 2021 at 08:30, Bjorn Andersson > wrote: > > > > On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote: > > > > > SA8155p-adp PMICs (PMM8155AU_1 and PMM8155AU_2) expose > > > the following PMIC GPIO blocks: > > > > > > - PMM8155AU_1: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7 and gpio8) > > > - PMM8155AU_2: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7) > > > > > > Add support for the same in the pinctrl driver. > > > > > > Cc: Linus Walleij > > > Cc: Liam Girdwood > > > Cc: Mark Brown > > > Cc: Bjorn Andersson > > > Cc: Vinod Koul > > > Cc: Rob Herring > > > Cc: Andy Gross > > > Cc: devicetree@vger.kernel.org > > > Cc: linux-kernel@vger.kernel.org > > > Cc: linux-gpio@vger.kernel.org > > > Cc: bhupesh.linux@gmail.com > > > Signed-off-by: Bhupesh Sharma > > > --- > > > drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 4 ++++ > > > 1 file changed, 4 insertions(+) > > > > > > diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c > > > index 00870da0c94e..890c44b6e198 100644 > > > --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c > > > +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c > > > @@ -1127,6 +1127,10 @@ static const struct of_device_id pmic_gpio_of_match[] = { > > > { .compatible = "qcom,pm8150b-gpio", .data = (void *) 12 }, > > > /* pm8150l has 12 GPIOs with holes on 7 */ > > > { .compatible = "qcom,pm8150l-gpio", .data = (void *) 12 }, > > > + /* pmm8155au-1 has 10 GPIOs with holes on 2, 5, 7 and 8 */ > > > + { .compatible = "qcom,pmm8155au-1-gpio", .data = (void *) 10 }, > > > > As noted in the binding, I think this should be "qcom,pmm8155au-gpio" > > and please skip the comment about the holes. > > Similar to what I noted in the binding patch review thread, the pmic > gpio holes seem different as per the downstream dtsi. > > So, please let me know and if required, I can make the suggested change in v2. > As noted in the binding, this really seems like software configuration. So we should deal with this in DT (e.g. by not referencing the gpios that Linux shouldn't touch), rather than the driver. Regards, Bjorn > Thanks, > Bhupesh > > > > + /* pmm8155au-2 has 10 GPIOs with holes on 2, 5 and 7 */ > > > + { .compatible = "qcom,pmm8155au-2-gpio", .data = (void *) 10 }, > > > { .compatible = "qcom,pm8350-gpio", .data = (void *) 10 }, > > > { .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 }, > > > { .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 }, > > > -- > > > 2.31.1 > > >