From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9DB2FC433F5 for ; Mon, 31 Jan 2022 16:41:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379067AbiAaQlw (ORCPT ); Mon, 31 Jan 2022 11:41:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1380561AbiAaQlu (ORCPT ); Mon, 31 Jan 2022 11:41:50 -0500 Received: from mail-oo1-xc33.google.com (mail-oo1-xc33.google.com [IPv6:2607:f8b0:4864:20::c33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81083C061714 for ; Mon, 31 Jan 2022 08:41:50 -0800 (PST) Received: by mail-oo1-xc33.google.com with SMTP id v17-20020a4ac911000000b002eac41bb3f4so3340097ooq.10 for ; Mon, 31 Jan 2022 08:41:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=Lccbg+paMSrfNOlYw3jpPC9OWvbn/WwrDOZkcaZPvcE=; b=vijErlFOE7h9CFvOpGy5DofZSxon73a/2uogpCN2gsvHTCGhtwRERz8/825La3DaiX 5ipwWnhjPWnbhZzKKegWu7eX3EbQinJ6B/KX1zZASrd+0GO6Ew3P1BEDxz+RPnYEWFuk J2O7AvzQ+xnSrIyZZfLfwDfzNhixKOVivSZldDFMSK4UqLIGLlO9QcQb5vXlXHPgVVpn ehjYw9jUhbkfBs24LjgEgEh4mHfVE4n4M4cZGQVt+If2HdEn6tjGcw8Q1kAKLCMdryY0 pfrmCRnKIoZk+NjASoWjPPW7T8dasrC+7+OvpoObpj460j6TpxdwEJr7uLjzJ7hNQS90 DdPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=Lccbg+paMSrfNOlYw3jpPC9OWvbn/WwrDOZkcaZPvcE=; b=ot7t+bo/kX8gsbNhapPLZib45GfKIApZDjvk/4g5X2tCSn5agRw4QnlRnNVZGwwwI/ xcA5mF9RnHpcsTVoaIXLwczo1KIjbY1+ugPFNk9+mfPZBuupaQYLdynTi3MIQY9qRyQh ZYd4gIQSaoHDINml3KwwRgOGs24FPDphuBRhUuRtcoUTE+9YgsS2s6AiQpxr+Rf4bLAm BvtmLhe0fJ6msyQftYpkoKrMfOLLTiMCJx92aFTuE60L1WK3w4yhcwUhZDyJfh8UpQOM nNOP4XH9DvKAcBPDqTVvQbQ4upy458TQkNeQPuxDTi8ulBLDaTfDIKuerOxqO1T6WTqW Me6w== X-Gm-Message-State: AOAM530zAQB4BHiQ9P/2RTH1aaMKMs58i0rGvOvWJ7kwNk5eIPoGZPWr ARXrXmCTihHGvxb1o9rFVFh9fA== X-Google-Smtp-Source: ABdhPJzjCFjNfjHPLsn3ZSMjJW96ABmq1kMkNtPhY1mK4eAvoRmBUiK54b1fVpZejSzB186165LJvw== X-Received: by 2002:a4a:a5c5:: with SMTP id k5mr10562610oom.66.1643647309810; Mon, 31 Jan 2022 08:41:49 -0800 (PST) Received: from builder.lan ([2600:1700:a0:3dc8:3697:f6ff:fe85:aac9]) by smtp.gmail.com with ESMTPSA id 71sm9562848otn.43.2022.01.31.08.41.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jan 2022 08:41:49 -0800 (PST) Date: Mon, 31 Jan 2022 10:41:47 -0600 From: Bjorn Andersson To: Stephen Boyd Cc: Doug Anderson , Viresh Kumar , Konrad Dybcio , kgodara@codeaurora.org, Matthias Kaehlcke , Sibi Sankar , Prasad Malisetty , quic_rjendra@quicinc.com, Andy Gross , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm , LKML Subject: Re: [PATCH v2 5/5] arm64: dts: qcom: sc7280: Add herobrine-r1 Message-ID: References: <20220125224422.544381-1-dianders@chromium.org> <20220125144316.v2.5.I5604b7af908e8bbe709ac037a6a8a6ba8a2bfa94@changeid> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Thu 27 Jan 15:16 CST 2022, Stephen Boyd wrote: > Quoting Bjorn Andersson (2022-01-25 19:01:31) > > On Tue 25 Jan 15:46 PST 2022, Doug Anderson wrote: > > > > > Hi, > > > > > > On Tue, Jan 25, 2022 at 2:58 PM Stephen Boyd wrote: > > > > > > > > Quoting Douglas Anderson (2022-01-25 14:44:22) > > > > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts > > > > > new file mode 100644 > > > > > index 000000000000..f95273052da0 > > > > > --- /dev/null > > > > > +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts > > > > > @@ -0,0 +1,313 @@ > > > > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > > > > > +/* > > > > > + * Google Herobrine board device tree source > > > > > + * > > > > > + * Copyright 2022 Google LLC. > > > > > + */ > > > > > + > > > > > +/dts-v1/; > > > > > + > > > > > +#include "sc7280-herobrine.dtsi" > > > > > + > > > > > +/ { > > > > > + model = "Google Herobrine (rev1+)"; > > > > > + compatible = "google,herobrine", "qcom,sc7280"; > > > > > > > > Can we stop adding "qcom,sc7280" to the board compatible string? It > > > > looks out of place. It's the compatible for the SoC and should really be > > > > the compatible for the /soc node. > > > > > > I don't have any objections, but I feel like this is the type of thing > > > I'd like Bjorn to have the final say on. What say you, Bjorn? > > > > > > > One practical case I can think of right away, where this matters is in > > cpufreq-dt-plat.c where we blocklist qcom,sc7280. > > > > I don't know if we rely on this in any other places, but I'm not keen on > > seeing a bunch of board-specific compatibles sprinkled throughout the > > implementation - it's annoying enough having to add each platform to > > these drivers. > > Looking at sc7180, grep only shows cpufreq-dt-plat.c > Good, then we handle all other platform specifics in drivers using platform-specific compatibles. > $ git grep qcom,sc7180\" -- drivers > drivers/cpufreq/cpufreq-dt-platdev.c: { .compatible = "qcom,sc7180", }, > > Simplest solution would be to look at / and /soc for a compatible > string. > You mean that / would contain the device's compatible and /soc the soc's compatible? I'm afraid I don't see how this would help you - you still need the compatible in the dts, just now in two places. Either we leave it as is - which follows my interpretation of what the DT spec says - or we (and the DT maitainers) agree that it shouldn't be there (because this dtb won't run on any random qcom,sc7180 anyways) at all. Regards, Bjorn > $ git grep -W 'soc[^:]*{' -- arch/arm*/boot/dts/ | grep compatible | > grep -v "simple-bus" > > doesn't show many hits. The first hit is "ti,omap-infra" which is > actually inside an soc node, but even then I don't see anything that > matches the cpufreq-dt-plat.c lists. > > ----8<----- > diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c > b/drivers/cpufreq/cpufreq-dt-platdev.c > index ca1d103ec449..32bfe453f8b4 100644 > --- a/drivers/cpufreq/cpufreq-dt-platdev.c > +++ b/drivers/cpufreq/cpufreq-dt-platdev.c > @@ -179,25 +179,29 @@ static bool __init cpu0_node_has_opp_v2_prop(void) > static int __init cpufreq_dt_platdev_init(void) > { > struct device_node *np = of_find_node_by_path("/"); > + struct device_node *soc_np = of_find_node_by_path("/soc"); > const struct of_device_id *match; > const void *data = NULL; > > - if (!np) > + if (!np && !soc_np) > return -ENODEV; > > match = of_match_node(allowlist, np); > - if (match) { > + if (match || (match = of_match_node(allowlist, soc_np))) { > data = match->data; > goto create_pdev; > } > > - if (cpu0_node_has_opp_v2_prop() && !of_match_node(blocklist, np)) > + if (cpu0_node_has_opp_v2_prop() && !of_match_node(blocklist, np) && > + !of_match_node(blocklist, soc_np)) > goto create_pdev; > > + of_node_put(soc_np); > of_node_put(np); > return -ENODEV; > > create_pdev: > + of_node_put(soc_np); > of_node_put(np); > return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt", > -1, data,