Re: [PATCH 1/3] drm/msm/dpu1: Add DMA2, DMA3 clock control to enum

Dmitry Baryshkov
2022-02-09T02:41:15Z

On 13/01/2022 17:51, Jami Kettunen wrote:
> From: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
>
> The enum dpu_clk_ctrl_type misses DPU_CLK_CTRL_DMA{2,3} even though
> this driver does actually handle both, if present: add the two in
> preparation for adding support for SoCs having them.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> Signed-off-by: Jami Kettunen <jami.kettunen@somainline.org>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index 31af04afda7d..736f52c742fb 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -435,6 +435,8 @@ enum dpu_clk_ctrl_type {
> DPU_CLK_CTRL_RGB3,
> DPU_CLK_CTRL_DMA0,
> DPU_CLK_CTRL_DMA1,
> + DPU_CLK_CTRL_DMA2,
> + DPU_CLK_CTRL_DMA3,
> DPU_CLK_CTRL_CURSOR0,
> DPU_CLK_CTRL_CURSOR1,
> DPU_CLK_CTRL_INLINE_ROT0_SSPP,

--
With best wishes
Dmitry