From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B35BFC433F5 for ; Wed, 4 May 2022 13:41:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350749AbiEDNpJ (ORCPT ); Wed, 4 May 2022 09:45:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350741AbiEDNpJ (ORCPT ); Wed, 4 May 2022 09:45:09 -0400 Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A36F2C64D for ; Wed, 4 May 2022 06:41:33 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 55C18CE262A for ; Wed, 4 May 2022 13:41:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 00B0EC385A5; Wed, 4 May 2022 13:41:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651671689; bh=8izgCIj9I2NmuN+VVbgtEFpR/n2CW+64r3eJYl8w76E=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=mnlDB4YdFdEbEmBQ1KPloG1YeaejdTprTQukTlTESxwdn0Kz2RmClFa4yUd5nzfFL Z0lg8FDOI9Fesg06rFk1ngwCPN+Uhv4ZLfOTL3puKtPFLVM+drz960NnQjPv67XhcE MDlrMJ4K97CTIeLg9ZmBf28L4YzD90QLb8rXvaYOc80yQzfVAQXc/lB+F7VP0/KB1D fBO1Kokm8d5r+tUfcwMhZ2JB2pdwy+sjjPB/htLiW+hKgZsECQY0RF9Piip7VxI4Iw f9pBEQ8F6x+zBI7dSc+eG9knthSLHsI16U78NFDEMc2P7GBfmh0NMQPQgNxlAOSr4R O6SwAGFYbTI4w== Date: Wed, 4 May 2022 19:11:25 +0530 From: Vinod Koul To: Marijn Suijten Cc: Dmitry Baryshkov , freedreno@lists.freedesktop.org, kernel test robot , David Airlie , linux-arm-msm@vger.kernel.org, Abhinav Kumar , dri-devel@lists.freedesktop.org, Stephen Boyd , Rob Clark , Daniel Vetter , Bjorn Andersson , Sean Paul Subject: Re: [Freedreno] [PATCH v2] drm/msm/dsi: use RMW cycles in dsi_update_dsc_timing Message-ID: References: <20220430175533.3817792-1-dmitry.baryshkov@linaro.org> <20220430185807.yn2j2coyc77qzx2o@SoMainline.org> <02114b24-f954-f145-4918-01cc3def65ac@linaro.org> <20220501204102.3xijmadbcrxwyu3x@SoMainline.org> <4e308633-cb0d-7050-9ee0-421190683eac@linaro.org> <20220502084322.nvj7rnhnemewmil6@SoMainline.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220502084322.nvj7rnhnemewmil6@SoMainline.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 02-05-22, 10:43, Marijn Suijten wrote: > On 2022-05-02 01:44:20, Dmitry Baryshkov wrote: > that require DSC for the screen to work. I've been told the series > didn't result in positive screen output way back in its infancy, but I would be intrested to hear about that. I have only pixel3 at my disposal so tested on that. I would be willing to help with more testing efforts. Also, to get DSC to work, the panel needs to be set as well... > I'll re-evaluate and send fixes or improvements if/when necessary. That would be nice -- ~Vinod