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From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Andy Gross <agross@kernel.org>,
	Stephen Boyd <swboyd@chromium.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Taniya Das <quic_tdas@quicinc.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Krzysztof Wilczy??ski <kw@linux.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Johan Hovold <johan+linaro@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-pci@vger.kernel.org, Johan Hovold <johan@kernel.org>,
	kernel test robot <lkp@intel.com>
Subject: Re: [PATCH v11 1/5] clk: qcom: regmap: add PHY clock source implementation
Date: Mon, 27 Jun 2022 15:02:17 -0500	[thread overview]
Message-ID: <YroMyWNO8ZLk1bTe@builder.lan> (raw)
In-Reply-To: <20220608192233.GA413725@bhelgaas>

On Wed 08 Jun 14:22 CDT 2022, Bjorn Helgaas wrote:

> On Wed, Jun 08, 2022 at 01:52:34PM +0300, Dmitry Baryshkov wrote:
> > On recent Qualcomm platforms the QMP PIPE clocks feed into a set of
> > muxes which must be parked to the "safe" source (bi_tcxo) when
> > corresponding GDSC is turned off and on again. Currently this is
> > handcoded in the PCIe driver by reparenting the gcc_pipe_N_clk_src
> > clock. However the same code sequence should be applied in the
> > pcie-qcom endpoint, USB3 and UFS drivers.
> > 
> > Rather than copying this sequence over and over again, follow the
> > example of clk_rcg2_shared_ops and implement this parking in the
> > enable() and disable() clock operations. Supplement the regmap-mux with
> > the new clk_regmap_phy_mux type, which implements such multiplexers
> > as a simple gate clocks.
> > 
> > This is possible since each of these multiplexers has just two clock
> > sources: one coming from the PHY and a reference (XO) one.  If the clock
> > is running off the from-PHY source, report it as enabled. Report it as
> > disabled otherwise (if it uses reference source).
> > 
> > This way the PHY will disable the pipe clock before turning off the
> > GDSC, which in turn would lead to disabling corresponding pipe_clk_src
> > (and thus it being parked to a safe, reference clock source). And vice
> > versa, after enabling the GDSC the PHY will enable the pipe clock, which
> > would cause pipe_clk_src to be switched from a safe source to the
> > working one.
> > 
> > Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
> > Tested-by: Johan Hovold <johan+linaro@kernel.org>
> > Reported-by: kernel test robot <lkp@intel.com>
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> >  drivers/clk/qcom/Makefile             |  1 +
> >  drivers/clk/qcom/clk-regmap-phy-mux.c | 62 +++++++++++++++++++++++++++
> >  drivers/clk/qcom/clk-regmap-phy-mux.h | 33 ++++++++++++++
> >  3 files changed, 96 insertions(+)
> >  create mode 100644 drivers/clk/qcom/clk-regmap-phy-mux.c
> >  create mode 100644 drivers/clk/qcom/clk-regmap-phy-mux.h
> 
> Since it's posted as part of the series, I assume this should all be
> applied together, so I'll look for an ack from Bjorn Andersson
> <bjorn.andersson@linaro.org>, maintainer of drivers/clk/qcom.

Hi Bjorn,

Picking the clock patch through the clock tree would allow us to fix up
additional platforms (analog to patch 2 & 3) in time for v5.20 and
reduces risk for merge conflicts.

So please find an immutable branch (tag) of the clock patches here:
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git
tags/20220608105238.2973600-1-dmitry.baryshkov@linaro.org

Hope this suits you.

Regards,
Bjorn

  reply	other threads:[~2022-06-27 20:02 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-08 10:52 [PATCH v11 0/5] PCI: qcom: Rework pipe_clk/pipe_clk_src handling Dmitry Baryshkov
2022-06-08 10:52 ` [PATCH v11 1/5] clk: qcom: regmap: add PHY clock source implementation Dmitry Baryshkov
2022-06-08 19:22   ` Bjorn Helgaas
2022-06-27 20:02     ` Bjorn Andersson [this message]
2022-06-15 19:46   ` Stephen Boyd
2022-06-16 18:25   ` Bjorn Helgaas
2022-06-08 10:52 ` [PATCH v11 2/5] clk: qcom: gcc-sm8450: use new clk_regmap_phy_mux_ops for PCIe pipe clocks Dmitry Baryshkov
2022-06-15 19:47   ` Stephen Boyd
2022-06-08 10:52 ` [PATCH v11 3/5] clk: qcom: gcc-sc7280: " Dmitry Baryshkov
2022-06-15 19:49   ` Stephen Boyd
2022-06-08 10:52 ` [PATCH v11 4/5] PCI: qcom: Remove unnecessary pipe_clk handling Dmitry Baryshkov
2022-06-15 19:50   ` Stephen Boyd
2022-07-14  1:07   ` Stanimir Varbanov
2022-06-08 10:52 ` [PATCH v11 5/5] PCI: qcom: Drop manual pipe_clk_src handling Dmitry Baryshkov
2022-06-15 19:51   ` Stephen Boyd
2022-07-14  1:08   ` Stanimir Varbanov
2022-07-14 16:56     ` Bjorn Helgaas
2022-06-16 18:21 ` [PATCH v11 0/5] PCI: qcom: Rework pipe_clk/pipe_clk_src handling Bjorn Helgaas
2022-07-07 14:03   ` Dmitry Baryshkov
2022-07-07 15:40     ` Bjorn Helgaas
2022-07-07 17:09       ` Dmitry Baryshkov
2022-07-07 20:04       ` Bjorn Helgaas
2022-06-27 20:02 ` (subset) " Bjorn Andersson

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