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From: Johan Hovold <johan@kernel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: "Andy Gross" <agross@kernel.org>,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Konrad Dybcio" <konrad.dybcio@somainline.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Vinod Koul" <vkoul@kernel.org>,
	"Kishon Vijay Abraham I" <kishon@ti.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-phy@lists.infradead.org
Subject: Re: [PATCH v4 1/6] phy: qcom-qmp-pcie: split register tables into common and extra parts
Date: Mon, 26 Sep 2022 15:24:55 +0200	[thread overview]
Message-ID: <YzGoJx55sFdw40Td@hovoldconsulting.com> (raw)
In-Reply-To: <5a93a4fc-b6a9-6371-84c1-ff39c60dbb5a@linaro.org>

On Mon, Sep 26, 2022 at 02:35:07PM +0300, Dmitry Baryshkov wrote:
> On 26/09/2022 10:27, Johan Hovold wrote:
> > On Sat, Sep 24, 2022 at 07:02:57PM +0300, Dmitry Baryshkov wrote:
> >> SM8250 configuration tables are split into two parts: the common one and
> >> the PHY-specific tables. Make this split more formal. Rather than having
> >> a blind renamed copy of all QMP table fields, add separate struct
> >> qmp_phy_cfg_tables and add two instances of this structure to the struct
> >> qmp_phy_cfg. Later on this will be used to support different PHY modes
> >> (RC vs EP).
> >>
> >> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> >> ---
> >>   drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 129 ++++++++++++++---------
> >>   1 file changed, 77 insertions(+), 52 deletions(-)
> >>
> >> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> >> index 7aff3f9940a5..30806816c8b0 100644
> >> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> >> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> >> @@ -1300,31 +1300,30 @@ static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_pcs_misc_tbl[] = {
> >>   	QMP_PHY_INIT_CFG(QPHY_V5_20_PCS_PCIE_G4_PRE_GAIN, 0x2e),
> >>   };
> >>   
> >> -/* struct qmp_phy_cfg - per-PHY initialization config */
> >> -struct qmp_phy_cfg {
> >> -	int lanes;
> >> -
> >> -	/* Init sequence for PHY blocks - serdes, tx, rx, pcs */
> >> +struct qmp_phy_cfg_tables {
> >>   	const struct qmp_phy_init_tbl *serdes_tbl;
> >>   	int serdes_tbl_num;
> > 
> > So I still think you should drop the now redundant "tbl" suffix and
> > infix.
> > 
> >> -	const struct qmp_phy_init_tbl *serdes_tbl_sec;
> >> -	int serdes_tbl_num_sec;
> >>   	const struct qmp_phy_init_tbl *tx_tbl;
> >>   	int tx_tbl_num;
> >> -	const struct qmp_phy_init_tbl *tx_tbl_sec;
> >> -	int tx_tbl_num_sec;
> >>   	const struct qmp_phy_init_tbl *rx_tbl;
> >>   	int rx_tbl_num;
> >> -	const struct qmp_phy_init_tbl *rx_tbl_sec;
> >> -	int rx_tbl_num_sec;
> >>   	const struct qmp_phy_init_tbl *pcs_tbl;
> >>   	int pcs_tbl_num;
> >> -	const struct qmp_phy_init_tbl *pcs_tbl_sec;
> >> -	int pcs_tbl_num_sec;
> >>   	const struct qmp_phy_init_tbl *pcs_misc_tbl;
> >>   	int pcs_misc_tbl_num;
> >> -	const struct qmp_phy_init_tbl *pcs_misc_tbl_sec;
> >> -	int pcs_misc_tbl_num_sec;
> >> +};
> >> +
> >> +/* struct qmp_phy_cfg - per-PHY initialization config */
> >> +struct qmp_phy_cfg {
> >> +	int lanes;
> >> +
> >> +	/* Main init sequence for PHY blocks - serdes, tx, rx, pcs */
> >> +	struct qmp_phy_cfg_tables common;
> > 
> > And this could be "tbls_common".
> 
> I'd go for common_tables, if you don't mind.

Sure, if you prefer.

	struct qmp_phy_cfg_tables	tables;
	struct qmp_phy_cfg_tables	tables_ep;
	struct qmp_phy_cfg_tables	tables_rc;

Could also be an alternative. Not sure the "common" prefix/suffix really
adds anything.

Johan

  reply	other threads:[~2022-09-26 14:56 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-24 16:02 [PATCH v4 0/6] PCI: qcom: Support using the same PHY for both RC and EP Dmitry Baryshkov
2022-09-24 16:02 ` [PATCH v4 1/6] phy: qcom-qmp-pcie: split register tables into common and extra parts Dmitry Baryshkov
2022-09-26  6:32   ` Johan Hovold
2022-09-26 10:22     ` Dmitry Baryshkov
2022-09-26  7:27   ` Johan Hovold
2022-09-26 11:35     ` Dmitry Baryshkov
2022-09-26 13:24       ` Johan Hovold [this message]
2022-09-24 16:02 ` [PATCH v4 2/6] phy: qcom-qmp-pcie: split PHY programming to separate functions Dmitry Baryshkov
2022-09-26  7:33   ` Johan Hovold
2022-09-24 16:02 ` [PATCH v4 3/6] phy: qcom-qmp-pcie: support separate tables for EP mode Dmitry Baryshkov
2022-09-26  6:37   ` Johan Hovold
2022-09-26  7:48   ` Johan Hovold
2022-09-24 16:03 ` [PATCH v4 4/6] phy: qcom-qmp-pcie: Support SM8450 PCIe1 PHY in " Dmitry Baryshkov
2022-09-24 16:03 ` [PATCH v4 5/6] PCI: qcom: Setup PHY to work in RC mode Dmitry Baryshkov
2022-09-24 23:54   ` Han Jingoo
2022-09-24 16:03 ` [PATCH v4 6/6] PCI: qcom-ep: Setup PHY to work in EP mode Dmitry Baryshkov
2022-09-24 23:53   ` Han Jingoo

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