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Thu, 27 Feb 2025 07:37:20 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51R7bJ07017861 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 27 Feb 2025 07:37:19 GMT Received: from hu-wasimn-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 26 Feb 2025 23:37:11 -0800 Date: Thu, 27 Feb 2025 13:07:02 +0530 From: Wasim Nazir To: Krzysztof Kozlowski CC: Dmitry Baryshkov , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , Subject: Re: [PATCH v5 5/6] arm64: dts: qcom: Add support for QCS9075 Ride & Ride-r3 Message-ID: References: <4wmxjxcvt7un7wk5v43q3jpxqjs2jbc626mgah2fxbfuouu4q6@ptzibxe2apmx> <37isla6xfjeofsmfvb6ertnqe6ufyu3wh3duqsyp765ivdueex@nlzqyqgnocib> <67b888fb-2207-4da5-b52e-ce84a53ae1f9@kernel.org> <80e59b3b-2160-4e24-93f2-ab183a7cbc74@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <80e59b3b-2160-4e24-93f2-ab183a7cbc74@kernel.org> X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: bVkyS-N2-HDk6rlfPnogYgbU2vuiEstj X-Proofpoint-GUID: bVkyS-N2-HDk6rlfPnogYgbU2vuiEstj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-27_03,2025-02-26_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 clxscore=1015 mlxscore=0 adultscore=0 mlxlogscore=999 suspectscore=0 phishscore=0 bulkscore=0 malwarescore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502270057 On Wed, Jan 15, 2025 at 09:35:34AM +0100, Krzysztof Kozlowski wrote: > On 15/01/2025 06:48, Wasim Nazir wrote: > >> The the SoC, I am asking about the board. Why each of them is for > >> example r3? > >> > >> So this is not sufficient explanation, nothing about the board, and > >> again just look Renesas and NXP. > >> > > > > Hi Krzysztof, > > > > sa8775p(AUTO), qcs9100(IOT), qcs9075(IOT) are different SoCs based on > > safety capabilities and memory map, serving different purpose. > > Ride & Ride-r3 are different boards based on ethernet capabilities and > > are compatible with all the SoCs mentioned. > Hi Krzysztof, > Compatible? What does it mean for a board? > Ride board is based on multiple daughter cards (SOC-card, display, camera, ethernet, pcie, sensor, etc.). The SOC is not directly soldered to Ride board, instead SOC is soldered on SIP (System in Package) card which can be mounted on SOC-daughter card of Ride board. - SoC => SIP-card => SOC-daughter-card (Ride) Together with SIP cards and other daughter cards we are creating different -Ride Variants with differences in memory map & thermal mitigations. The SIP card consists of SOC, PMIC & DDR and it is pin compatible to the SOC daughter card of -Ride board. Only SOC is changing accross SIP cards, except an additional third party SIL-PMIC for SAIL, which is not present in QCS9075 Ride. Other daughter cards remains same for -Ride variants, except ethernet card which is different for -Ride rev3 variants. So the Ride board (combination of daughter cards) is same across the SIP, while SOC on SIP card is changing which can be sa8775p, qcs9100 or qcs9075. > Third time: did you look how other vendors do it? > Yes, we have reviewed other vendors. However, please feel free to share any specific reference you would like us to follow. Here are few reference files we found from other vendors where similar tasks are performed which includes code refactoring and HW modularity: - Freescale: fsl-ls208xa.dtsi, fsl-ls2088a.dtsi, fsl-ls2081a-rdb.dts - Renesas: white-hawk-common.dtsi, r8a779g0-white-hawk.dts - Rockchip: px30-engicam-common.dtsi, px30-engicam-ctouch2.dtsi, px30-engicam-px30-core-ctouch2.dts In our case along with describing the HW, code refactoring is also done which might be causing confusion, but we are ready for any inputs for correction. Putting this pictorial diagram for updated DT structure depicting our HW. - qcs9xxx-module.dtsi specifying QCS9xxx based SIP card/module having SoC, PMICs, Memory-map updates. - qcom-ride-common.dtsi specifying ride daughter boards, here we are doing code refactoring also as this is common for all ride boards. - qcom-ride-ethernet-aqr115c.dtso specifying ethernet overlay board which uses 2.5G phy and can be overlayed to ride boards to get ride-r3. By default ride uses 1G phy. - qcs9075-iq-9075-evk.dts is the new name for RB8 as per new product name. We will be changing this in next patch series. +-----------------------------------------------------------------------------------------------------------------------------------------------+ | | | sa8775p.dtsi | | | | | +-------------------------+-----------------------+ | | | | | | | v | v | | qcs9075-module.dtsi | qcs9100-module.dtsi | | | | | | | v v v | | (IOT) (AUTO) (IOT) | | | | | | | +----------------------+ | | | | | | | | | | | | +-------------------------+-----------------------+-------------------< qcom-ride-common.dtsi | | | | | | | | | | | v v v v v v v | | qcs9075-iq-9075-evk.dts qcs9075-ride.dts sa8775p-ride.dts qcs9100-ride.dts | | | | | | | | +-------------------------+-----------------------+-------------------< qcom-ride-ethernet-aqr115c.dtso | | | | | | | | | | v v v v v v | | qcs9075-ride-r3.dts sa8775p-ride-r3.dts qcs9100-ride-r3.dts | | | +-----------------------------------------------------------------------------------------------------------------------------------------------+ > > > > With the combination of these 3 SoCs and 2 boards, we have 6 platforms, > > all of which we need. > > - sa8775p-ride.dts is auto grade Ride platform with safety feature. > > - qcs9100-ride.dts is IOT grade Ride platform with safety feature. > > - qcs9075-ride.dts is IOT grade Ride platform without safety feature. > > > > Since the Ride-r3 boards are essentially Ride boards with Ethernet > > modifications, we can convert the Ride-r3 DTS to overlays. > How one board can be with multiple SoCs? If it is soldered, it's close > to impossible - that's just not the same board. If it is not soldered, > why you are not explaining it? What is Ride board? What is there? What > can go there? How it can be used in other SoCs? Or for which SoCs? Is > there a datasheet available? > As our SoC is based on SIP card and SIP card is compatible with Ride board, we could able to use same Ride board (which is combination of multiple daughter cards) with multiple SIP cards. These SIP cards can be of sa8775p, qcs9100 or qcs9075 SOC. > You keep repeating my about SoC and I keep responding the same: don't care. > > Best regards, > Krzysztof Thanks & Regards, Wasim