From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60A82C77B7A for ; Thu, 1 Jun 2023 10:49:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232167AbjFAKtR (ORCPT ); Thu, 1 Jun 2023 06:49:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231513AbjFAKtQ (ORCPT ); Thu, 1 Jun 2023 06:49:16 -0400 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AC690107 for ; Thu, 1 Jun 2023 03:49:14 -0700 (PDT) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-30ad752f433so638254f8f.3 for ; Thu, 01 Jun 2023 03:49:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685616553; x=1688208553; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=c6i9C4EP8AHVTuV3ZMe99mOFKpU+CtVbrRAVY/z6F08=; b=oc+kSwOejXR3o5/TWUq6wGiMZH/wU0no+eCTXLchWMtnXgaiUV33WezN5EA/yl+X5F LEVZkkU++l0Bj45+pvR8elTDVufgCbeLTHLjbgcKs35VWnaaW/9VVmSAGWQEmVLP0Lts DcEXgeZt5UgqblJvZ9VM+jfWObwaYWAIba9D7HSLT5bFrYTJS92ttbJcV9yh1oNZ6mI5 3FrbFhOl1cm6ahXz5UmCcaJGBD0cNV9H7HNXkJ8JSvaXkFy3YmKlwRMGPo5X2iJa8oGz QhWyEt7hTdqUnJD0Hx/u60zbwkk+FB4H10l4xarKuWGyZBYTKP6aUk5MAg7ZAxt7YQGZ Bg0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685616553; x=1688208553; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=c6i9C4EP8AHVTuV3ZMe99mOFKpU+CtVbrRAVY/z6F08=; b=hVkqBGY9stsqSzdxeUPYgfICatcbdzeW0PTMsrwvJKSs3EYFrmR2zTGb0Slt3owEKp 3fLTSRAd7p0RDGZaz5lLF9XBStb1gmtPWy2eQ1Tm8hg3ZHGfk4DzD9bMJ7eWs5VHCLDh TgXA00iaE1PcP6BHXLVnnaRIf0iQXsno6D+xzdhgQuse4g/z+hAU/66XYaGwajOQP+s1 qVM/dyQQwTm+N1vBi+2XOB1ltFgkqaCnyL4IqbvVyvL5RlVlMiEKNVrZnDVAZQp+wnmO 07RM5AfQOcVv0JtcFX0KW+mbtLtnlfFN78z4P9EK6SHtRD+N6E9nWC/T10Jsy0z/MhsW oFTA== X-Gm-Message-State: AC+VfDwWID4hSJAJpoScPQJpUmIHt+jOatNK339abMjuHN6itt5DjZdJ ymUilitUTFNLlNSqxKgnRojdygHMyjdDdDLC1dk= X-Google-Smtp-Source: ACHHUZ7fq/bLvbnOkM6SF0YMAS3rD6jeKKObv8mxqEWBcWmJbEXGSPr9VwRL/vKvivqbJrKzXyOFDQ== X-Received: by 2002:a5d:5412:0:b0:30a:e66f:7571 with SMTP id g18-20020a5d5412000000b0030ae66f7571mr1828931wrv.4.1685616553144; Thu, 01 Jun 2023 03:49:13 -0700 (PDT) Received: from linaro.org ([86.121.163.20]) by smtp.gmail.com with ESMTPSA id k5-20020adff5c5000000b0030af1d87342sm10037872wrp.6.2023.06.01.03.49.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 03:49:12 -0700 (PDT) Date: Thu, 1 Jun 2023 13:49:11 +0300 From: Abel Vesa To: Konrad Dybcio Cc: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Linux Kernel Mailing List Subject: Re: [PATCH] arm64: dts: qcom: sm8550: Add missing interconnect path to USB HC Message-ID: References: <20230601103817.4066446-1-abel.vesa@linaro.org> <34cd6db8-9f05-23cc-cd41-7fd48ec1a286@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <34cd6db8-9f05-23cc-cd41-7fd48ec1a286@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 23-06-01 12:42:22, Konrad Dybcio wrote: > > > On 1.06.2023 12:38, Abel Vesa wrote: > > The USB HC node is missing the interconnect paths, so add them. > > > > Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes") > For context, it's a fix in the context of "we should prooobably have > this if we want to fix the icc driver to include sync state". Fair enough... > > Signed-off-by: Abel Vesa > > --- > Reviewed-by: Konrad Dybcio > > > > sidenote: > > on recent SoCs there's also an USB-IPA path: > > aggre1_noc MASTER_USB3_0 <-> &config_noc SLAVE_IPA_CFG AFAIK, support for IPA on SM8550 is not added yet. We can worry about this 3rd path when IPA support for this platform is upstreamed. > > I don't think we really make use of that upstream today or whether it > would make enabling IPA necessary (to enable the clocks and reach the > IPA hardware), but it's something to think about. > > Konrad > > arch/arm64/boot/dts/qcom/sm8550.dtsi | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > > index 75cd374943eb..4991b2e962d1 100644 > > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > > @@ -2793,6 +2793,10 @@ usb_1: usb@a6f8800 { > > > > resets = <&gcc GCC_USB30_PRIM_BCR>; > > > > + interconnects = <&aggre1_noc MASTER_USB3_0 0 &mc_virt SLAVE_EBI1 0>, > > + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>; > > + interconnect-names = "usb-ddr", "apps-usb"; > > + > > status = "disabled"; > > > > usb_1_dwc3: usb@a600000 {