Re: [PATCH v3 8/9] soc: qcom: cpr3: Add IPQ9574 definitions

[Varadarajan Narayanan <quic_varada@quicinc.com>]

On Thu, Jun 27, 2024 at 04:46:05PM +0300, Dmitry Baryshkov wrote:
> On Thu, Jun 27, 2024 at 12:53:18PM GMT, Varadarajan Narayanan wrote:
> > On Wed, Jun 26, 2024 at 09:27:53PM +0300, Dmitry Baryshkov wrote:
> > > On Wed, Jun 26, 2024 at 04:10:01PM GMT, Varadarajan Narayanan wrote:
> > > > From: Praveenkumar I <quic_ipkumar@quicinc.com>
> > > >
> > > > Add thread, scaling factor, CPR descriptor defines to enable CPR
> > > > on IPQ9574.
> > > >
> > > > Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
> > > > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> > > > ---
> > > > v3: Fix patch author
> > > >     Included below information in cover letter
> > > > v2: Fix Signed-off-by order
> > > > Depends:
> > > > 	[1] https://lore.kernel.org/lkml/20230217-topic-cpr3h-v14-0-9fd23241493d@linaro.org/T/
> > > > 	[2] https://github.com/quic-varada/cpr/commits/konrad/
> > > > ---
> > > >  drivers/pmdomain/qcom/cpr3.c | 137 +++++++++++++++++++++++++++++++++++
> > > >  1 file changed, 137 insertions(+)
> > > >
> > > > diff --git a/drivers/pmdomain/qcom/cpr3.c b/drivers/pmdomain/qcom/cpr3.c
> > > > index c28028be50d8..66c8a4bd9adc 100644
> > > > --- a/drivers/pmdomain/qcom/cpr3.c
> > > > +++ b/drivers/pmdomain/qcom/cpr3.c
> > >
> > > > +
> > > > +static const struct cpr_desc ipq9574_cpr_desc = {
> > > > +	.cpr_type = CTRL_TYPE_CPR4,
> > >
> > > So, is it CPR4 or CPRh?
> >
> > CPR4.
>
> Then why do you have cprh in the compatible?

Sorry, copy-paste from msm8998. Will fix that in the next version.

Thanks
Varada

> > > > +	.num_threads = 1,
> > > > +	.apm_threshold = 850000,
> > > > +	.apm_crossover = 880000,
> > > > +	.apm_hysteresis = 0,
> > > > +	.cpr_base_voltage = 700000,
> > > > +	.cpr_max_voltage = 1100000,
> > > > +	.timer_delay_us = 5000,
> > > > +	.timer_cons_up = 0,
> > > > +	.timer_cons_down = 0,
> > > > +	.up_threshold = 2,
> > > > +	.down_threshold = 2,
> > > > +	.idle_clocks = 15,
> > > > +	.count_mode = CPR3_CPR_CTL_COUNT_MODE_ALL_AT_ONCE_MIN,
> > > > +	.count_repeat = 1,
> > > > +	.gcnt_us = 1,
> > > > +	.vreg_step_fixed = 12500,
> > > > +	.vreg_step_up_limit = 1,
> > > > +	.vreg_step_down_limit = 1,
> > > > +	.vdd_settle_time_us = 34,
> > > > +	.corner_settle_time_us = 6,
> > > > +	.reduce_to_corner_uV = true,
> > > > +	.hw_closed_loop_en = false,
> > > > +	.threads = (const struct cpr_thread_desc *[]) {
> > > > +		&ipq9574_thread_silver,
> > >
> > > If it's silver, where is gold or bronze?
> >
> > Will rename this as "ipq9574_thread"
> >
> > Thanks
> > Varada
> >
> > > > +	},
> > > > +};
> > > > +
> > > > +static const struct cpr_acc_desc ipq9574_cpr_acc_desc = {
> > > > +	.cpr_desc = &ipq9574_cpr_desc,
> > > > +};
> > > > +
> > > >  static const int sdm630_gold_scaling_factor[][CPR3_RO_COUNT] = {
> > > >  	/* Same RO factors for all fuse corners */
> > > >  	{
> > > > @@ -2828,6 +2964,7 @@ static void cpr_remove(struct platform_device *pdev)
> > > >  }
> > > >
> > > >  static const struct of_device_id cpr3_match_table[] = {
> > > > +	{ .compatible = "qcom,ipq9574-cprh", .data = &ipq9574_cpr_acc_desc },
> > > >  	{ .compatible = "qcom,msm8998-cprh", .data = &msm8998_cpr_acc_desc },
> > > >  	{ .compatible = "qcom,sdm630-cprh", .data = &sdm630_cpr_acc_desc },
> > > >  	{ }
> > > > --
> > > > 2.34.1
> > > >
> > >
> > > --
> > > With best wishes
> > > Dmitry
>
> --
> With best wishes
> Dmitry