[PATCH net-next 1/8] net: phy: add support for overclocked SGMII

Bartosz Golaszewski
2024-06-19T18:46:04Z

From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

The Aquantia AQR115C PHY supports the Overlocked SGMII mode. In order to
support it in the driver, extend the PHY core with the new mode bits and
pieces.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
---
drivers/net/phy/phy-core.c | 1 +
drivers/net/phy/phylink.c | 13 ++++++++++++-
include/linux/phy.h | 4 ++++
3 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c
index 15f349e5995a..7cf87cae11f0 100644
--- a/drivers/net/phy/phy-core.c
+++ b/drivers/net/phy/phy-core.c
@@ -138,6 +138,7 @@ int phy_interface_num_ports(phy_interface_t interface)
case PHY_INTERFACE_MODE_RXAUI:
case PHY_INTERFACE_MODE_XAUI:
case PHY_INTERFACE_MODE_1000BASEKX:
+ case PHY_INTERFACE_MODE_OCSGMII:
return 1;
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_QUSGMII:
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index 02427378acfd..ce07d41a233f 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -128,6 +128,7 @@ static const phy_interface_t phylink_sfp_interface_preference[] = {
PHY_INTERFACE_MODE_5GBASER,
PHY_INTERFACE_MODE_2500BASEX,
PHY_INTERFACE_MODE_SGMII,
+ PHY_INTERFACE_MODE_OCSGMII,
PHY_INTERFACE_MODE_1000BASEX,
PHY_INTERFACE_MODE_100BASEX,
};
@@ -180,6 +181,7 @@ static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
switch (interface) {
case PHY_INTERFACE_MODE_SGMII:
case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
+ case PHY_INTERFACE_MODE_OCSGMII:
return 1250;
case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
return 3125;
@@ -231,6 +233,7 @@ static int phylink_interface_max_speed(phy_interface_t interface)
return SPEED_1000;

case PHY_INTERFACE_MODE_2500BASEX:
+ case PHY_INTERFACE_MODE_OCSGMII:
return SPEED_2500;

case PHY_INTERFACE_MODE_5GBASER:
@@ -515,6 +518,10 @@ static unsigned long phylink_get_capabilities(phy_interface_t interface,
caps |= MAC_1000HD | MAC_1000FD;
fallthrough;

+ case PHY_INTERFACE_MODE_OCSGMII:
+ caps |= MAC_2500FD;
+ fallthrough;
+
case PHY_INTERFACE_MODE_REVRMII:
case PHY_INTERFACE_MODE_RMII:
case PHY_INTERFACE_MODE_SMII:
@@ -929,6 +936,7 @@ static int phylink_parse_mode(struct phylink *pl,
case PHY_INTERFACE_MODE_10GKR:
case PHY_INTERFACE_MODE_10GBASER:
case PHY_INTERFACE_MODE_XLGMII:
+ case PHY_INTERFACE_MODE_OCSGMII:
caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);
caps = phylink_get_capabilities(pl->link_config.interface, caps,
RATE_MATCH_NONE);
@@ -1357,7 +1365,8 @@ static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)

case MLO_AN_INBAND:
link_state = pl->link_config;
- if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
+ if (link_state.interface == PHY_INTERFACE_MODE_SGMII ||
+ link_state.interface == PHY_INTERFACE_MODE_OCSGMII)
link_state.pause = MLO_PAUSE_NONE;
break;

@@ -3640,6 +3649,7 @@ void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
break;

case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_OCSGMII:
case PHY_INTERFACE_MODE_QSGMII:
phylink_decode_sgmii_word(state, lpa);
break;
@@ -3715,6 +3725,7 @@ int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
adv |= ADVERTISE_1000XPSE_ASYM;
return adv;
case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_OCSGMII:
case PHY_INTERFACE_MODE_QSGMII:
return 0x0001;
default:
diff --git a/include/linux/phy.h b/include/linux/phy.h
index e6e83304558e..73da0983d631 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -128,6 +128,7 @@ extern const int phy_10gbit_features_array[1];
* @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
* @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
* @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
+ * @PHY_INTERFACE_MODE_OCSGMII: Overclocked SGMII
* @PHY_INTERFACE_MODE_MAX: Book keeping
*
* Describes the interface between the MAC and PHY.
@@ -168,6 +169,7 @@ typedef enum {
PHY_INTERFACE_MODE_10GKR,
PHY_INTERFACE_MODE_QUSGMII,
PHY_INTERFACE_MODE_1000BASEKX,
+ PHY_INTERFACE_MODE_OCSGMII,
PHY_INTERFACE_MODE_MAX,
} phy_interface_t;

@@ -289,6 +291,8 @@ static inline const char *phy_modes(phy_interface_t interface)
return "100base-x";
case PHY_INTERFACE_MODE_QUSGMII:
return "qusgmii";
+ case PHY_INTERFACE_MODE_OCSGMII:
+ return "ocsgmii";
default:
return "unknown";
}
--
2.43.0