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Wed, 26 Jun 2024 05:27:13 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 45Q5RBqi022196 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 26 Jun 2024 05:27:11 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 25 Jun 2024 22:27:06 -0700 Date: Wed, 26 Jun 2024 10:57:02 +0530 From: Varadarajan Narayanan To: Konrad Dybcio CC: , , , , , , , , , , , , , , Subject: Re: [PATCH v11 0/6] Add interconnect driver for IPQ9574 SoC Message-ID: References: <20240430064214.2030013-1-quic_varada@quicinc.com> <90bb9256-d54d-4e01-aa06-4184e2b95d48@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: dWqOxM9yRy2tFHsSWLqgpDrfMRDaAXu3 X-Proofpoint-ORIG-GUID: dWqOxM9yRy2tFHsSWLqgpDrfMRDaAXu3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-26_03,2024-06-25_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 suspectscore=0 phishscore=0 clxscore=1015 spamscore=0 mlxscore=0 malwarescore=0 mlxlogscore=999 lowpriorityscore=0 impostorscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2406260040 On Tue, Jun 11, 2024 at 03:16:33PM +0530, Varadarajan Narayanan wrote: > On Thu, Jun 06, 2024 at 04:07:23PM +0200, Konrad Dybcio wrote: > > On 4.05.2024 10:01 AM, Varadarajan Narayanan wrote: > > > Bjorn, > > > > > >> On Tue, Apr 30, 2024 at 12:12:08PM +0530, Varadarajan Narayanan wrote: > > >> MSM platforms manage NoC related clocks and scaling from RPM. > > >> However, in IPQ SoCs, RPM is not involved in managing NoC > > >> related clocks and there is no NoC scaling. > > >> > > >> However, there is a requirement to enable some NoC interface > > >> clocks for the accessing the peripherals present in the > > >> system. Hence add a minimalistic interconnect driver that > > >> establishes a path from the processor/memory to those peripherals > > >> and vice versa. > > >> > > >> Change icc-clk driver to take master and slave ids instead > > >> of auto generating. > > >> > > >> Currently, drivers/clk/qcom/clk-cbf-8996.c is the only user of > > >> icc-clk. And, it had exactly one master and one slave node. > > >> For this the auto generated master (= 1) and slave (= 0) was > > >> enough. > > >> > > >> However, when drivers/clk/qcom/gcc-ipq9574.c wanted to make use > > >> of the icc-clk framework, it had more number of master and slave > > >> nodes and the auto generated ids did not suit the usage. > > >> > > >> --- > > >> v11: No code changes > > >> Commit log changed for the first patch > > >> Added Acked-By: to 3 patches > > > > > > Can this be included in your driver changes for 6.10? > > > Konrad, > > > FWIW there is still an open discussion at v9 > > > > Thanks for reminding. Have responded to it. > https://lore.kernel.org/linux-arm-msm/Zmgb+OjdBNw71sC1@hu-varada-blr.qualcomm.com/ Bjorn/Konrad, Can this be merged for 6.11. I believe the discussion open at v9 has been addressed. Please let me know if anything is still pending. Below patches depend on this series: PCI: https://lore.kernel.org/linux-arm-msm/20240512082858.1806694-1-quic_devipriy@quicinc.com/ NSSCC: https://lore.kernel.org/linux-arm-msm/20240625070536.3043630-1-quic_devipriy@quicinc.com/ Thanks Varada