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Tue, 29 Oct 2024 14:22:49 -0700 (PDT) Received: from localhost ([2607:fea8:52a3:d200::98bd]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7b18d32b9a2sm454857185a.82.2024.10.29.14.22.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 14:22:49 -0700 (PDT) Date: Tue, 29 Oct 2024 17:22:46 -0400 From: Richard Acayan To: Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Rob Clark , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: Re: [PATCH 0/2] iommu/arm-smmu-qcom: Add SDM670 SMMU v2 Message-ID: References: <20240730013820.41702-4-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240730013820.41702-4-mailingradian@gmail.com> On Mon, Jul 29, 2024 at 09:38:21PM -0400, Richard Acayan wrote: > This adds the SMMU v2 for the Snapdragon 670, used for the Adreno GPU. > > Richard Acayan (2): > dt-bindings: iommu: arm,smmu: add sdm670 adreno iommu compatible > iommu/arm-smmu-qcom: add sdm670 adreno iommu compatible > > Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 + > drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 + > 2 files changed, 2 insertions(+) Hi, I'm wondering if this is still being considered. The NAK doesn't really make sense here, as there's a warning/BUG at the bottom of the qcom SMMU driver that occurs when the compatible isn't added: /* * If you hit this WARN_ON() you are missing an entry in the * qcom_smmu_impl_of_match[] table, and GPU per-process page- * tables will be broken. */ WARN(of_device_is_compatible(np, "qcom,adreno-smmu"), "Missing qcom_smmu_impl_of_match entry for: %s", dev_name(smmu->dev)); DTS change for context (pending): https://lore.kernel.org/linux-arm-msm/20240806214452.16406-10-mailingradian@gmail.com