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Fri, 15 Nov 2024 22:45:17 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AFMjHtX011735 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 15 Nov 2024 22:45:17 GMT Received: from hu-wasimn-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 15 Nov 2024 14:45:13 -0800 Date: Sat, 16 Nov 2024 04:15:04 +0530 From: Wasim Nazir To: Dmitry Baryshkov CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , Subject: Re: [PATCH 4/5] arm64: dts: qcom: Add support for QCS9075 RB8 Message-ID: References: <20241110145339.3635437-1-quic_wasimn@quicinc.com> <20241110145339.3635437-5-quic_wasimn@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: BVc6NKfbzqsuDjM5yEXelA-bemv4SvYH X-Proofpoint-ORIG-GUID: BVc6NKfbzqsuDjM5yEXelA-bemv4SvYH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=631 mlxscore=0 malwarescore=0 bulkscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 clxscore=1015 spamscore=0 phishscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411150192 On Fri, Nov 15, 2024 at 06:05:20PM +0200, Dmitry Baryshkov wrote: > On Sun, Nov 10, 2024 at 08:23:38PM +0530, Wasim Nazir wrote: > > Add device tree support for the QCS9075-RB8 board. > > > > Basic changes are supported for boot to shell. > > > > Signed-off-by: Wasim Nazir > > --- > > arch/arm64/boot/dts/qcom/Makefile | 1 + > > arch/arm64/boot/dts/qcom/qcs9075-rb8.dts | 287 +++++++++++++++++++++++ > > 2 files changed, 288 insertions(+) > > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-rb8.dts > > > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > > index 9bb8b191aeb5..5d9847119f2e 100644 > > --- a/arch/arm64/boot/dts/qcom/Makefile > > +++ b/arch/arm64/boot/dts/qcom/Makefile > > @@ -115,6 +115,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb > > dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb > > dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb > > dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb > > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb > > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb > > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts b/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts > > new file mode 100644 > > index 000000000000..8d4a27a8f371 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts > > + > > +&tlmm { > > + /* FIXME: mdss0_dp0 is dependent on this so adding a dummy node for now */ > > + dp_hot_plug_det: dp-hot-plug-det-state {}; > > + > > + /* FIXME: mdss0_dp1 is dependent on this so adding a dummy node for now */ > > + dp1_hot_plug_det: dp1-hot-plug-det-state {}; > > I don't see these two being used in the MDSS node. Please drop. Thanks for pointing it out, will drop in next series. > > LGTM otherwise. > > > + > > + qup_uart10_default: qup-uart10-state { > > + pins = "gpio46", "gpio47"; > > + function = "qup1_se3"; > > + }; > > +}; > > -- > With best wishes > Dmitry Regards, Wasim