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Wed, 11 Mar 2026 02:37:25 -0700 (PDT) X-Received: by 2002:a17:902:e752:b0:2ae:7fa3:df1c with SMTP id d9443c01a7336-2aeae7feba0mr19090135ad.21.1773221845295; Wed, 11 Mar 2026 02:37:25 -0700 (PDT) Received: from [10.217.223.121] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2aeae35f0dbsm17237595ad.69.2026.03.11.02.37.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 11 Mar 2026 02:37:24 -0700 (PDT) Message-ID: Date: Wed, 11 Mar 2026 15:07:15 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 01/11] dt-bindings: crypto: qcom,ice: Allow power-domain and iface clk To: Krzysztof Kozlowski , Herbert Xu , "David S. Miller" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Abel Vesa , Manivannan Sadhasivam , cros-qcom-dts-watchers@chromium.org, Eric Biggers , Dmitry Baryshkov , Jingyi Wang , Tengfei Fan , Bartosz Golaszewski , Yuvaraj Ranganathan , David Wronek , Luca Weiss , Neil Armstrong , Melody Olvera Cc: Brian Masney , Neeraj Soni , Gaurav Kashyap , linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio References: <20260310-qcom_ice_power_and_clk_vote-v2-0-b9c2a5471d9e@oss.qualcomm.com> <20260310-qcom_ice_power_and_clk_vote-v2-1-b9c2a5471d9e@oss.qualcomm.com> <2ac2efad-3533-490e-bb42-f21c4e950277@kernel.org> Content-Language: en-US From: Harshal Dev In-Reply-To: <2ac2efad-3533-490e-bb42-f21c4e950277@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzExMDA4MCBTYWx0ZWRfX9G1x44yGvigG IS6ZCwdPjnj//X8sl4+ooicYYGhv3apDzPEBK1DyV//y1d5+GVKTjMWtY9cMw8/68tJd0QkECzT i0Six8b5ybz8w9qYNzfRHGXnyT7pnbehaUTxviLR/kwjcZFkalW+1Nm2WmDWyNuK65mcKFQLbrC ZMEJPFFT9CqIetM3hEnr7W9GCFtlOZSK7KBG56Cuolh6o13vgbFYX+fWKGLOaeV5k3z55b+VT4I XXK6AINrG/Xs1Wa0gq3wMv6zMIU9t4Q8VrxxG3Vm0C8D1xZDhBqlDYaBLp4iiqjtiiZhxPadS2m 0DqkCQ+1HYsGVCW0iVk2RPiONI7jXCaYkMyWXJ57Cbn0fNRf0ViDZKSFj/0vSqgrI+JmAm3Wb/o uPcY2vVEGvyodC2fDqOZNcrFVhVPRgww5RR/auEgZwk8KI7d8WagXfJXLZVBFAIKjKwsozAwG6X 99oe6aV2dbHs2sGLcEw== X-Proofpoint-GUID: VVvNc9aOWkJCifj2QgfV0V8Xcx5dKV0s X-Proofpoint-ORIG-GUID: VVvNc9aOWkJCifj2QgfV0V8Xcx5dKV0s X-Authority-Analysis: v=2.4 cv=Cq+ys34D c=1 sm=1 tr=0 ts=69b137d6 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=P-IC7800AAAA:8 a=EUspDBNiAAAA:8 a=e2fiLVR9xI0WNA4mEikA:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 a=d3PnA9EDa4IxuAV0gXij:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-11_01,2026-03-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 malwarescore=0 priorityscore=1501 clxscore=1015 suspectscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603110080 On 3/11/2026 1:55 AM, Krzysztof Kozlowski wrote: > On 10/03/2026 09:06, Harshal Dev wrote: >> Update the inline-crypto engine DT binding to allow specifying up to two >> clocks along with their names and associated power-domain. When the >> 'clk_ignore_unused' flag is not passed on the kernel command line >> occasional unclocked ICE hardware register access are observed during ICE >> driver probe based on the relative timing between the probe and the kernel >> disabling the unused clocks. On the other hand, when the 'pd_ignore_unused' >> flag is not passed on the command line, clock 'stuck' issues are >> observed if the power-domain required by ICE hardware is unused and thus >> disabled before ICE probe. To avoid these scenarios, the 'iface' clock and >> the associated power-domain should be specified in the ICE device tree node >> and the 'iface' clock should be voted on by the ICE driver during probe. >> >> Fixes: f6ff91a47ac57 ("dt-bindings: crypto: Add Qualcomm Inline Crypto Engine") >> Signed-off-by: Harshal Dev >> --- >> .../bindings/crypto/qcom,inline-crypto-engine.yaml | 16 +++++++++++++++- >> 1 file changed, 15 insertions(+), 1 deletion(-) >> >> diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml >> index c3408dcf5d20..d9a0a8adf645 100644 >> --- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml >> +++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml >> @@ -28,6 +28,16 @@ properties: >> maxItems: 1 >> >> clocks: >> + minItems: 1 >> + maxItems: 2 >> + >> + clock-names: >> + minItems: 1 >> + items: >> + - const: ice_core_clk > > core Ack. I'll introduce a check for this specific name here as well: https://elixir.bootlin.com/linux/v7.0-rc3/source/drivers/soc/qcom/ice.c#L582 > >> + - const: iface_clk > > iface or bus Ack, will call it 'iface'. > > I don't understand why this is flexible and commit msg does not explain > that. Devices do not have one and two clocks at the same time. You miss > proper constraints. > I agree, it might confuse someone reading the commit message the first time. I'll re-write the commit message to make it explicit that even though these two properties are 'required', for the time being we are introducing 'iface' clk and 'power-domain' as an optional property to maintain bisectability, and that the properties would be made 'required' in a subsequent commit once the DTS changes which are part of this patch series have reached the top tree. Let me know if any concerns with this kind of commit message. Regards, Harshal >> + >> + power-domains: >> maxItems: 1 > > > Best regards, > Krzysztof