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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-660af3bf657sm2569281a12.5.2026.03.05.01.05.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 05 Mar 2026 01:05:07 -0800 (PST) Message-ID: Date: Thu, 5 Mar 2026 10:05:04 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 5/7] clk: qcom: camcc-x1p42100: Add support for camera clock controller To: Bryan O'Donoghue , Dmitry Baryshkov , Jagadeesh Kona Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jagadeesh Kona , Konrad Dybcio , Abel Vesa , Rajendra Nayak , Stephan Gerhold , Ajit Pandey , Imran Shaik , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260304-purwa-videocc-camcc-v2-0-dbbd2d258bd6@oss.qualcomm.com> <20260304-purwa-videocc-camcc-v2-5-dbbd2d258bd6@oss.qualcomm.com> <2byedzh5w6ymnoebve74a2a7oezgich25wdh4pdsqmvv3jvpkf@kyk2gz5khibe> <2f1bdd7a-04a0-49a7-b275-4332f2979378@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <2f1bdd7a-04a0-49a7-b275-4332f2979378@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: HG4sfLGrCkriYCKS6cBOJ_pDPFEAviWK X-Proofpoint-ORIG-GUID: HG4sfLGrCkriYCKS6cBOJ_pDPFEAviWK X-Authority-Analysis: v=2.4 cv=GecaXAXL c=1 sm=1 tr=0 ts=69a94745 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=SOEfcho8Kit_SEfO-KEA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzA1MDA3MSBTYWx0ZWRfX4+dtwA6bft2L AG7oz2whWsSd9OPqy0Qmy4BBsILKU41HibDF1DbR03LB5KqOjFgGniwiFYlFj0mly+gy9YygUxC ytxwNQxLISyMk8XbrnfCtMc5PqOI7FTOm6umQw4ZTMTAloXv82EQSRuxc7Xk4FszwJ/4//IRXK7 AGxjpFiKsGGKOz1Uy5tii4iau3PF5ZKcTktYhAu4pa463GRLMyirqETYkYen+Ly0aC3fLp3bHGk rTlKjv4shVNbPwdqQZgN2LE3Jca/x3FZ1TSYzSr7JsCv/XRcRNMLXNHGPd988uFw88EHgMgODq1 YSn9bpIWd95A9wzuPCyTdRH4oxU/ir/UZ1Um+ChTKWpsYwOUQqS9NF9nN/JbmmWTURtspQacNuY 3nAb/VkruYUGR2O0vew+udPXBZBlKGjVeI7qhjzoOOiM1OBMp3IDf0wsK48s2hyTJD5OcTGIVTS hSJjq99A3no+W2Vef4g== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-05_02,2026-03-04_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 impostorscore=0 spamscore=0 suspectscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 malwarescore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603050071 On 3/5/26 3:18 AM, Bryan O'Donoghue wrote: > On 05/03/2026 00:33, Dmitry Baryshkov wrote: >> I've cross-checked this against X1E80100 driver. The main changes are a >> drop of IFE_1, SPE_0, and two PLLs. However it also: >> - uses hw_clk_ctrl for several clocks >> - uses rcg2_shared_ops instead of rcg2_ops for several clocks >> - uses hwcg_reg and BRANCH_HALT_VOTED for cam_cc_camnoc_axi_nrt_clk >> - uses HW_CTRL_TRIGGER for cam_cc_bps_gdsc and cam_cc_ipe_0_gdsc >> - uses non-AO clock for cam_cc_xo_clk_src >> >> Are all these changes expected? Are any of them also applicable to X1E? >> >> At this point, I'm torn between suggesting the merge of this driver into >> X1E driver and ack'ing the current form. > > We can test the diff but, I'm not sure that will really answer the question if it is the right-thing-to-do. > > OTOH if it ain't broke, don't fix it. > > Reverse the question - is there any reason to have this driver at all ? Can the x1e CAMCC be used as-is ? > > If not, then we can accept this patch and potentially look at merging the two drivers later on. > > I assume the code submitted has a purpose though i.e. its not possible to just use Hamoa and Purwa interchangably. > > A few community members showed me CAMSS working on Purwa last year in Amsterdam with the x1e code - one error if I recall was a clock splat. > > So superficially it adds up to me that its not a 1:1 thing with these two parts. The difference between 'can/does it work in some simple use case' vs 'is it correct' is that the exact match for clock configurations between H and P is (according to the computer) 4 clocks (out of 200+ in the camcc topology). Most of the changes are small differences in frequency steps or which PLL is used for a given OPP etc, which ends up being small in the Linux representation of that data since many of the freq tables are reused 3, 4, 5 times and many clocks (branches) don't even feature one. I would imagine almost all of the points raised by Dmitry probably apply (but I'll let the people in the know comment on that), which would greatly reduce the effective diff. If they do, the drivers could indeed be merged since the delta would be just those couple freq tables and NULLifying 13 clocks on Purwa Konrad